Visual defect inspection for electronics parts manufacturing processes is comprised of 2 steps - automatic visual inspection by machine and inspection by human inspectors. It is necessary that spatial points which were detected by the machine should be adequately clustered for subsequent human inspection. This research deals with the spatial clustering algorithm for the purpose of process productivity improvement. Distribution based clustering is newly developed and experimentally confirmed to show better clustering efficiency than existing algorithm - area based clustering.

The experimental analysis presented aims at the selection of the most optimal machining parameter combination for wire electrical discharge machining (WEDM) of STD11. Based on the Taguchi experimental design ($L_{27}$ orthogonal array) method, a series of experiments were performed by considering time-on, voltage, time-off, wire speed, and flow rate as input parameters. The surface roughness was considered responses. Based on the signal-to-noise (S/N) ratio, the influence of the input parameters on the responses was determined. The optimal machining parameters setting for the minimum surface roughness was found using Taguchi methodology. In order to investigate the effects of process parameters on the surface machined by WEDM, Several experiments are conducted to consider effects of time-on, voltage, time-off, wire speed and flow rate on the surface roughness. Analysis of variance (ANOVA) as well as regression analysis are performed on experimental data. The best results of surface roughness were obtained at higher voltage, lower wire speed, and lower time-on.

Phosphoric acid was used as etching agent instead of conventional peroxide - based chemicals for forming pattern of ultra definition display. Etchant was synthesized by mixing etching agent, oxidation agent, buffer solution, and additive into solvent, deionized water. Thicknesses of copper, main metal of ultra definition display, for etching, were 10,000 and $30,000{{\AA}}$. Etch stop of good low skew for proper pattern formation has been occurred at the content ratio of phosphoric acid 60 - 64%, nitric acid 4 - 5%, additive(potassium acetate) 1 - 3%. Buffer solution(acetic acid) decreased the metal contact angle $63.07^{\circ}$ to $42.49^{\circ}$ for benefiting pattern formation. Content variations on four components (phosphoric acid, nitric acid, acetic acid, potassium acetic acid) of the etchant with storage time were within 3 wt% after 24 hrs of etching work.

The texturing is one of the most important processes for high efficiency crystalline silicon solar cells. The rear side flatness of silicon solar cell is very important for increasing the light reflectance and forming uniform back surface field(BSF) region in manufacturing high efficiency crystalline silicon solar cells. We investigated texturing difference between front and rear side of wafer by texturing of two adhered wafers. As a result, the flatter rear side was obtained by forming less pyramid size compared to the front side and improved reflectance of long wavelength and back surface field(BSF) region were also achieved. Therefore, the texturing of two adhered wafers can be expected to improve the efficiency of silicon solar cells due to increased short circuit current(Isc).

To develop high efficiency crystalline solar cells, the $SiN_x$ film for surface passivation and anti-reflection coating is very important and it is generally deposited by PECVD. In this paper, the $SiN_x$ film deposited by Hot-Wire chemical vapor deposition(HWCVD) that has no plasma damage was studied. First, to optimize the $SiN_x$ film deposition process, $SiH_4$ gas rate and substrate temperature were varied and then refractive index and thickness were measured. When $SiH_4$ gas rate was 22sccm and substrate temperature was $100^{\circ}C$, refractive index was 1.94 and higher than that of other process conditions. Second, the lifetime was measured by varying the annealing temperature and time. The annealing process was made from 5 to 30 minutes at $300{\sim}500^{\circ}C$. When the annealing temperature was $100^{\circ}C$ and time was 10minute, the lifetime was the highest. The lifetime of annealed samples was also measured after the firing process at $975^{\circ}C$. Although the lifetime of all samples was decreased by firing process, the lifetime of annealed samples before the firing process was higher than that of fired samples only. Finally, the characteristics of solar cells with HWCVD $SiN_x$ film were measured.

Flat panel displays fabricated on glass substrate use amorphous Si for data processing circuit. Recent progress in display technology requires a new material to replace the amorphous Si, and ZnO is a good candidate. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. ZnO is usually grown by sputtering using ZnO ceramic target. However, ceramic target is more expensive than metal target, and making large area target is very difficult. In this work we studied characteristics of ZnO thin-film transistor grown by rf sputtering using Zn metal target and $CO_2$. ZnO film was grown at $450^{\circ}C$ substrate temperature, with -70 V substrate bias voltage applied. By using these methods, our ZnO TFT showed $5.2cm^2/Vsec$ mobility, $3{\times}10^6$ on-off ratio, and -7 V threshold voltage.

The effect of electrode charging on the ion energy distribution (IED) was investigated in the dual-frequency capacitively coupled plasma source which was powered of 100 MHz RF at the top electrode and 400 kHz bias on the bottom electrode. The charging property was analyzed with the distortion of the measured current and voltage waveforms. The capacitance and the resistance of electrode sheath can change the property of ion and electron charging on the electrode so it is sensitive to the plasma density which is controlled by the main power. The ion energy distribution was estimated by equivalent circuit model, being compared with the measured distribution obtained from the ion energy analyzer. Results show that the low frequency bias power changes effectively the low energy population of ion in the energy distribution.

In this paper, we propose a super-junction MOSFET (SJ MOSFET) fabricated through a simple pillar forming process by varying the Si epilayer thickness and doping concentration of pillars using SILVACO TCAD simulation. The design of the SJ MOSFET structure is presented, and the doping concentration of pillar, breakdown voltage ($V_{BR}$) and drain current are analyzed. The device performance of conventional Si planar metal-oxide semiconductor field-effect transistor(MOSFET), Si SJ MOSFET, and SiGe SJ MOSFET was investigated. The p- and n-pillars in Si SJ MOSFET suppressed the punch-through effect caused by drain bias. This lead to the higher $V_{BR}$ and reduced on resistance of Si SJ MOSFET. An increase in the thickness of Si epilayer and decrease in the former is most effective than the latter. The implementation of SiGe epilayer to SJ MOSFET resulted in the improvement of $V_{BR}$ as well as drain current in saturation region, when compared to Si SJ MOSFET. Such a superior device performance of SiGe SJ MOSFET could be associated with smaller bandgap of SiGe which facilitated the drift of carriers through lower built-in potential barrier.

Ni-CNT(Carbon Nanotubes) composite coating is often used for the surface treatment of mechanical/electronic devices to improve the properties of the Ni coating. For the Ni-CNT coating, the dispersion of CNT fibers is a critical process. In this study, ultrasonic treatment instead of the conventional ball milling was attempted as a dispersion method for the electroless Ni-CNT coating. SEM-EDX analysis was performed and contact angle, sheet resistance, and micro-hardness were measured. Results showed that the ultrasonic treatment was comparable to the ball milling, as a dispersion method, but the difference was negligible. However, combined ball milling and ultrasonic treatment(double treatment) showed much improved micro-hardness value, above 350Hv(close to the value obtained by the Ni-CNT electroplating). In addition, electroless Ni-CNT(double-treated) coatings formed on the thin Ni film deposited by the electroless plating(double coating) showed better mechanical properties. Thus, double treatment and double coating are suggested as an improved electroless Ni-CNT coating method.

The distortion correction system of Head up display that is installed in vehicle has been studied both experimentally and theoretically for the removal of the optical lens distortion. A new adaptive correction method is having a decisive effect on correction in the optical lens distortion of Head up display. This adaptive correction system removes various distortion that has occurred because of the design tolerances of Head up display and the assemble tolerances into vehicle. It is especially efficient in removal of a barrel distortion and pin cushion of Head up display.

Micro-cracks in crystalline silicon wafer often result in wafer breakage in solar wafer manufacturing, and also their existence may lead to electrical failure in post fabrication inspection. Therefore, the reliable detection of micro-cracks is of importance in the photovoltaic industry. In this paper, an experimental method to select optimal parameters in anisotropic diffusion filter is proposed. It can reliably detect micro-cracks by the distinct extension of boundary as well as noise reduction in near-infrared image patterns of micro-cracks. Its performance is verified by experiments of several type cracks machined.