In this paper, we design the pattern generator circuits using PLDs(Programmable Logic Devices). The pattern generator is the circuit which generates the test pattern signal for the inspection of logical defects of semiconductor products. The proposed circuits are designed by the PLD design tool(MAX+ II of ALTERA). Also the designed circuits are simulated for the verification of the designed ones. The simulation results have a good performance.

This paper describes a newly developed simulation environment for analysis and design of a plasma processing chamber based on first principles including complicated physical and chemical interactions of plasma, fluid dynamics of neutrals, and transport phenomena of particles. Capabilities of our simulator, named VIP-SEPCAD (Virtual Integrated Prototyping Simulation Environment for Plasma Chamber Analysis and Design), are demonstrated through a two dimensional simulation of an oxygen plasma chamber. VIP-SEPCAD can provide plasma properties such as spatiotemporal profiles of plasma density and potential, electron temperature, ion flux and energy, etc. By coupling neutral and particle transport models with a three moment plasma model, VIP-SEPCAD can also predict spatiotemporal profiles of chemically reactive species and particles exist in plasma.

An adaptor is designed for chamber impedance measurement of plasma process. Copper rod, fixed board and compensation circuit are the major components of the adaptor. An adaptor can be to measure chamber impedance on time unless stopping a process and Data to measure can do the database. We can use it to a criteria data for a failure diagnosis. So developed adaptor could be used for diagnosis the plasma process chamber in semiconductor industry.

In this paper, Si anisotropic etching characteristics of tetramethylammonium hydroxide (TMAH)/ammonium persulfate (AP) solutions were investigated to realize the optimum structure of a diaphragm for the piezoresistive pressure sensor application. Due to its low toxicity and its high compatibility with the CMOS processing, TMAH was used as Si anisotropic etchants. The variations of Si etch rate on the etching temperature, TMAH concentration, and etching time were obtained. With increasing the etching temperature and decreasing TMAH concentrations, the Si etch rate is increased while a significant non-uniformity exists on the etched surface because of formation of hillocks on the <100> surface. With the addition of AP to TMAH solution, the Si etch rate is increased and an improvement in flatness on the etching front is observed. The Si etch rate is also maximized with increasing the number of addition of AP to TMAH solution per one hour. The Si square diaphragms of 20$\mu\textrm{m}$ thickness and 100-400 $\mu\textrm{m}$ one-side length were fabricated successfully by adding AP of (5/6)g to 800 ml TMAH solution every 10 minutes.

The general users find difficulties in using ellipsometers. Thus, the object of this study is to construct an ellipsometer with simple operation principle. We developed an ellipsometer which does not require alignment and calibration before measuring sample. A basis structure model after rotating a compensator spectroscopic ellipsometry, the fixed incidence angle at $70^{\circ}$. This ellipsometer does not demand calibration, because the plane of incidence is not changed due to the novel sample holder structure. The results for various standard samples were compared with those from conventional RCSE to test the performance of this instrument. Also repeated measurements were performed to test the precision of the calibration coefficient in a plane of incidence fixed.

The effect of fabrication method of catalytic layer on electrode performance has been investigated. Brush, spray gun and screen printer were used as fabrication tool and catalytic layers were formed by several methods in screen printing. Direct screen printing on polymer membrane, screen printing on carbon paper, and their combined method were applied. In the electrode fabricated by the screen printing method, Pt loading of Pt/C catalysts could be cut down to 50%, compared with results by the brushing and spraying methods. The best result of electrode was obtained as 0.6 V, at 1 A/$\textrm{cm}^2$ when catalytic layer was formed by the combined way.

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

반도체 장비의 기능성과 신뢰성을 높이기 위하여 부품의 제조기술은 점차 마이크로 머신 기술을 요구하고 있다. 마이크로머신 기술 중 hot junction이 위치하는 멤브레인 구조는 각종 센서와 히터의 미세부품에서 가장 이용도가 큰 구조이다. 실험에서는 마이크로머신의 기본 구조인 멤브레인 형태를 만들기 위해 KOH 용액과 TMAH 용액으로 단결정 실리콘을 이방성 습식식각 하였다. 실험결과, 식각액의 온도와 농도, 마스크 패턴과 웨이퍼의 결정성의 일치 등을 고려해야 하며, 식각 속도는 KOH 농도 및 온도에 따라 크게 변함을 알 수 있었다. KOH 용액은 30 wt% 80~$90^{\circ}C$ 온도 범위에서 가장 좋은 특성을 나타냈다. 한편, TMAH용액이 실리콘을 식각하는 용액으로 관심을 끄는 것은 단결정에서 상대적으로 $SiO_2$ 박막을 마스크로 사용할 수 있을 뿐 아니라 $SiO_2$ 박막을 마스크로 사용할 수 있을 뿐 아니라 다른 식각액보다 찌꺼기가 적다는 장점 때문이다. 그러나, 다른 용액에 비해 가격이 고가이며 식각 속도가 낮다는 것이 실용적인 측면에서 큰 단점이다. 실험결과를 종합적으로 고려할 때 KOH 용액 농도 30wt%와 온도 $90^{\circ}C$가 마이크로머신 기술에 의한 멤브레인 구조 제작에서 적합한 공정조건이라고 할 수 있다.