• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.243-244
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• 2017

This paper introduces about the difference between the tunneling currents in the 1D and 2D directions for the calculation of the band-to-band tunneling currents of the tunneling field effect transistors. In the two-dimensional tunneling, diagonal tunneling is not calculated in the one-dimensional tunneling so that more accurate tunneling current can be calculated. Simulation results show that the tunneling in the two - dimensional direction has no effect on the voltage above the threshold voltage, but it affects the subthreshold swing below the threshold voltage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.616-618
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• 2016

Four types of structure of tunnel field-effect transistors (TFETs) have been investigated by TCAD simulation. Pocket and L-shaped TFETs are better performance than single-gate and double-gate TFETs in terms of on-current and subthreshold swing. New guideline of TFETs is presented for the structure design.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.167-169
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• 2016

The structure guide lines of pocket tunnel field effect transistor(TFET) considering Line and Point tunneling are introduced. As the pocket doping concentration or thickness increase, on-current $I_{on}$ increases. As the pocket thickness or gate insulator increase, subthreshold swing(SS) increases. Optimal structure reducing the hump effects should be proposed in order to enhance SS.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.166-168
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• 2016

This paper introduces about the structure guide lines of pocket tunneling Field effect transistor. As the pocket length or thickness increase, on-current $I_{on}$ increases. As the pocket thickness is less than 3nm, subthreshold swing (SS) increase. As the dielectric constants of the gate insulator increases, the performance of on-current and subthreshold swing enhances.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.475-476
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• 2019

L-shaped tunneling field-effect-transistor (LTFET) is considered a superior device over conventional TFETs. However, experimentally demonstrated LTFET demonstrated poor subthreshold characteristics which was attributed to trap-assisted-tunneling (TAT) caused by presence of trap states. In this paper, TAT mechanism in the experimentally demonstrated LTFET is investigated with the help of band diagram and TAT recombination rate (GTAT).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.450-452
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• 2016

The effect of channel doping on L-shaped Tunneling Field-Effect Transistors (TFETs) have been investigated by 2D TCAD simulation. When the source doping is over $10^{20}cm^{-3}$, the subthreshold swing (SS) is abruptly decreased, and when drain doping concentration is below $10^{18}cm^{-3}$, the leakage current in the negative voltage is reduced.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.611-613
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• 2016

The characteristics of tunnel field-effect transistor(TFET) structure with source-overlapped gate was investigated using a TCAD simulations. Tunneling is mostly divided into line-tunneling and point-tunneling, and line-tunneling is higher performance than point-tunneling in terms of subthreshold swing(SS) and on-current. In this paper, from the simulation results of source-overlapped gate length effects at silicon(Si), germanium(Ge), Si-Ge hetero TFET structure, the guideline of optimal structure with highest performance are proposed.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.179-183
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• 2012

The random dopant fluctuation (RDF) effects of tunneling field-effect transistors (TFETs) have been observed by using atomistic 3-D device simulation. Due to extremely low body doping concentration, the RDF effects of TFETs have not been seriously investigated. However, in this paper, it has been found that the randomly generated and distributed source dopants increase the variation of threshold voltage ($V_{th}$), drain induced current enhancement (DICE) and subthreshold slope (SS) of TFETs. Also, some ways of relieving the RDF effects of TFETs have been presented.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.5
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• pp.682-687
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• 2022

In this paper, the research results on monolithic three-dimensional integrated-circuit (M3DICs) stacked with tunneling field effect transistors (TFETs) are introduced. Unlike metal-oxide-semiconductor field-effect transistors (MOSFETs), TFETs are designed differently from the layout of symmetrical MOSFETs because the source and drain of TFET are asymmetrical. Various monolithic 3D inverter (M3D-INV) structures and layouts are possible due to the asymmetric structure, and among them, a simple inverter structure with the minimum metal layer is proposed. Using the proposed M3D-INV, this M3D logic gates such as NAND and NOR gates by sequentially stacking TFETs are proposed, respectively. The simulation results of voltage transfer characteristics of the proposed M3D logic gates are investigated using mixed-mode simulator of technology computer aided design (TCAD), and the operation of each logic circuit is verified. The cell area for each M3D logic gate is reduced by about 50% compared to one for the two-dimensional planar logic gates.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.4
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• pp.1-6
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• 2012

This paper presents the extraction and analysis of small-signal parameters of tunneling field-effect transistors (TFETs) by using TCAD device simulation. The channel lengths ($L_G$) of the simulated devices varies from 50 nm to 100 nm. The parameter extraction for TFETs have been performed by quasi-static small-signal model of conventional MOSFETs. The small-signal parameters of TFETs with different channel lengths were extracted according to gate bias voltage. The $L_G$-dependency of the effective gate resistance, transconductance, source-drain conductance, and gate capacitance are different with those of conventional MOSFET. The $f_T$ of TFETs is inverely proportional not to $L_G{^2}$ but to $L_G$.