• Journal of the Korean Crystal Growth and Crystal Technology
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• v.29 no.2
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• pp.50-53
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• 2019

In this study, polycrystalline silicon thin film useful for the solar cells was fabricated by AIC(Aluminum Induced Crystallization) process. A diffusing barrier for this process is prepared with $Al_2O_3$. For the maximization of the grain size of the polycrystalline silicon, a selective blasting of the $Al_2O_3$ diffusing barrier was conducted before annealing treatment. The heat treatment for the activation of the amorphous-Si (a-Si) layer was carried out with Rapid Thermal Annealing (RTA) process. Crystallization of the a-Si layer was analyzed with XRD. It was confirmed that a-Si was crystallized at $500^{\circ}C$ and the silicon crystal is observed to be formed and the grain size of the polycrystalline silicon was observed to be $15.9{\mu}m$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.2
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• pp.152-155
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• 2011

Even though nano-scale materials were very advantageous for various applications, there are still problems to be solved such as the stabilization of surface state and realization of low contact resistances between a semiconducting nanowire and electrodes in nano-electronics. It is well known that the effects of contacts barrier between nano-channel and metal electrodes were dominant in carrier transportation in individual nano-electronics. In this report, it was investigated the electrical properties of GaN nanorod devices after chemical etching and rapid thermal annealing for making good contacts. After KOH wet-etching of the contact area the devices showed better electrical performance compared with non-treated GaN individual devices but still didn't have linear voltage-current characteristics. The shape of voltage-current properties of GaN devices were improved remarkably after rapid thermal annealing as showing Ohmic behaviors with further bigger conductivities. Even though chemical etching of the nanorod surfaces could cause scattering of carriers, in here it was shown that the most important and dominant factor in carrier transport of nano-electronics was realization of low contact barrier between nano-channel and metal electrodes surely.

• Applied Science and Convergence Technology
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• v.26 no.6
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• pp.208-213
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• 2017

Flexible opto-electronic devices are developed on the insulating layer deposited stainless steel (STS) substrates. The silicon dioxide ($SiO_2$) material as the diffusion barrier of Fe and Cr atoms in addition to the electrical insulation between the electronic device and STS is processed using the plasma enhanced chemical vapor deposition method. Noble silver (Ag) films of approximately 100 nm thickness have been formed on $SiO_2$ deposited STS substrates by E-beam evaporation technique. The films then were annealed at $650^{\circ}C$ for 20 min using the rapid thermal annealing (RTA) technique. It was investigated the variation of the surface morphology due to the interaction between Ag films and $SiO_2$ layers after the RTA treatment. The results showed the movement of Si atoms in silver film from $SiO_2$. In addition, the structural investigation of Ag annealed at $650^{\circ}C$ indicated that the Ag film has the material property of p-type semiconductor and the bandgap of approximately 1 eV. Also, the films annealed at $650^{\circ}C$ showed reflection with sinusoidal oscillations due to optical interference of multiple reflections originated from films and substrate surfaces. Such changes can be attributed to both formation of $SiO_2$ on Ag film surface and agglomeration of silver film between particles due to annealing.

• 대한공업교육학회지
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• v.33 no.1
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• pp.249-264
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• 2008

In this dissertation, shallow $p^+-n$ junctions were formed by ion implantation and dual-step annealing processes and a new simulator is designed to model boron diffusion in silicon. This simulator predicts the boron distribution after ion implantation and annealing. The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a RTA(Rapid Thermal Annealing) and a FA(Furnace Annealing) process. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of sheet resistance and the simulator reproduced experimental data successfully. Therefore, proposed diffusion simulator and FA+RTA annealing method was able to applied to shallow junction formation for thermal budget. process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.446-447
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• 2007

The rapid thermal annealing effect of transparent IZTO(indium zinc oxide) and IAZO(indium alminium zinc oxide) films grown on glass substrate for solar cell or flat panel displays(FPDs) was studied. We prepared IZTO using RF magnetron sputtering and IAZO using DC co-sputtering method. Subsequently, using rapid thermal annealing(RTA) system, prepared IZTO and IAZO films were annealed at 300, 400, 500, $600^{\circ}C$ for 90sec. In addition, Electrical and optical characteristics were measured by Hall effect measurement and UV/Vis spectrometer examinations, respectively. To analyze structural properties and surface smoothness of the IZTO and IAZO films, XRD and SEM examinations were performed, respectively. It was shown that IZTO and IAZO films exhibited microcrystalline structure over $400^{\circ}C$ and amorphous structural regardless of RTA temperature, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.164-164
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• 2010

Cds films were deposited on glass substrates using rf magnetron sputtering method followed by rapid thermal annealing(RTA). Effects of annealing temperature on surface characteristic, structural, electrical and optical property of CdS films were investigated at different temperatures ranging from 250 to $550^{\circ}C$ with various holding time. The film annealed at $450^{\circ}C$ with less than 1 min holding time is attributed to the improved crystalline quality of CdS film due to the effective relaxation of residual compressive stress and achieving maximum grain size. The results show that RTA treatments under optimal annealing condition can provide significant improvements in the properties of CdS films.

• Journal of the Korean Society for Heat Treatment
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• v.35 no.6
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• pp.314-318
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• 2022

Transparent conducting ZnO/Ti/ZnO tri-layer films deposited on glass substrate with DC and RF magnetron sputtering were rapid thermal annealed at 150, 300 and 450℃ for 5 minutes and then effect of annealing temperature on the structural and optoelectronics properties of the films were investigated. The structural properties are strongly related to annealing temperature and the largest grain size is observed in the films annealed at 450℃. The electrical resistivity also decreases as low as 7.7 × 10^-4 Ωcm. The visible transmittance also depends on the annealing temperature. The films annealed at 450℃ show a higher transmittance of 80.6% in this study.

• Journal of Magnetics
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• v.10 no.2
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• pp.52-57
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• 2005

In this research, magnetoresistance (MR) ratio (MR), resistivity, and exchange coupling field $(H_{ex})$ behaviors for sputter deposited spin valves with FeMn antiferromagnetic layer have been extensively investigated by rapid thermal annealing (RTA) as well as conventional annealing (CA) method. 10 s of RTA revealed that interdiffusion was not significant up to $325^{\circ}C$ at the interfaces between the layers when the RTA time was short. The MR of FeMn spin valves were reduced when the spin valves were exposed to temperature of $250^{\circ}C$, even for a short time period of 10 s prior to CA. $H_{ex}$ was maintained up to $325^{\circ}C$ of CA when the specimen was subjected to 10 s of RTA at $200^{\circ}C$ prior to CA, which is $25^{\circ}C$ higher than the result obtained from the CA without prior RTA. Therefore, the stability of $H_{ex}$ could be enhanced by a prior RTA before performing CA up to annealing temperature of $325^{\circ}C$. MR and sensitivity of the specimens annealed without magnetic field up to $275^{\circ}C$ were recovered to the values prior to CA, but $H_{ex}$ was not recovered. This means that reduced MR sensitivity and MR during the device fabrication can be recovered by a field RTA.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.83-88
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• 2005

The interface-states between the top silicon layer and buried oxide layer of nano-SOI substrate were developed. Also, the effects of thermal treatment processes on the interface-state distributions were investigated for the first time by using pseudo-MOSFETs. We found that the interface-state distributions were strongly influenced by the thermal treatment processes. The interface-states were generated by the rapid thermal annealing (RTA) process. Increasing the RTA temperature over $800^{\circ}C$, the interface-state density considerably increased. Especially, a peak of interface-states distribution that contributes a hump phenomenon of subthreshold curve in the inversion mode operation of pseudo-MOSFETs was observed at the conduction band side of the energy gap, hut it was not observed in the accumulation mode operation. On the other hand, the increased interface-state density by the RTA process was effectively reduced by the relatively low temperature annealing process in a conventional thermal annealing (CTA) process.

• Journal of Magnetics
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• v.6 no.4
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• pp.126-128
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• 2001

The effect of rapid thermal anneal (RTA) has been investigated on the properties of an FeMn exchange-biased magnetic tunnel junction (MTJ) using magnetoresistance and I-V measurements and transmission electron microscopy (TEM). The tunneling magnetoresistance (TMR) in an as-grown MTJ is found to be ∼27%, while the TMR in MTJs annealed by RTA increases with annealing temperature up to 300$\^{C}$, reaching ∼46%. A TEM image reveals a structural change in the interface of A1$_2$O$_3$layer for the MTJ annealed by RTA at 300$\^{C}$. The oxide barrier parameters are found to vary abruptly with annealing time within a few ten seconds. Our results demonstrate that the present RTA enhances the magnetoresistive properties of MTJs.