• Korean Journal of Materials Research
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• v.16 no.5
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• pp.302-307
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• 2006

The formation and processing of organic insulators on the device performance have been studied in the fabrication of organic thin film transistors (OTFTs). The series of polyvinyls, poly-4-vinyl phenol(PVP) and polyvinyltoluene (PVT), were used as solutes and propylene glycol monomethyl ether acetate(PGMEA) as a solvent in the formation of organic insulators. The cross-linking of organic insulators was also attempted by adding the thermosetting material, poly (melamine-co-formaldehyde) as a hardener in the compound. The electrical characteristics measured in the metal-insulator-metal (MIM) structures showed that insulating properties of PVP layers were generally superior to those of PVT layers. Among the layers of PVP series: PVP(10 wt%) copolymer, 5 wt% cross-linked PVP(10 wt%), PVP(20 wt%) copolymer, 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%), the 10 wt% cross-linked PVP(20 wt%) layer showed the lowest leakage current characteristics. Finally, inverted staggered OTFTs using the PVP(20 wt%) copolymer, 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%) as gate insulators were fabricated on the polyether sulphone (PES) substrates. In our experiments, we could obtain the maximum field effect mobility of 0.31 $cm^2/Vs$ in the device from 5 wt% cross-linked PVP(20 wt%) and the highest on/off current ratio of $1.92{\times}10^5$ in the device from 10 wt% cross-linked PVP(20 wt%).

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.45-51
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• 2004

We have proposed a new shallow trench isolation (STI) process using flowable oxide (F-oxide) chemical vapor deposition (CVD) for DRAM application and it was successfully developed. The combination of F-oxide CVD and HDP CVD is thought to be the superior STI gap-filling process for next generation DRAM fabrication because F-oxide not only improves STI gap-filling capability, but also the reduced local stress by F-oxide in narrow trenches leads to decrease in junction leakage and gate induced drain leakage (GIDL) current. Finally, this process increased data retention time of DRAM compared to HDP STI. However, a serious failure occurred by symphonizing its structural dependency of deposited thickness with poor resistance against HF chemicals. It could be suppressed by reducing the flow time during F-oxide deposition. It was investigated collectively in terms of device yield. In conclusion, the combination of F-oxide and HDP oxide is the very promising technology for STI gap filling process of sub-100nm DRAM technology.

• ETRI Journal
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• v.42 no.5
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.20-28
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• 2003

In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.96-99
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• 2007

The effects of post-annealing of high-k $HfO_2$ thin films grown by atomic layer deposition method were investigated by the annealing treatments of $400-600^{\circ}C$. $Pt/HfO_2/p-Si\;MOS$ capacitor structures were fabricated, and then the capacitance-voltage and current-voltage characteristics were measured to analyze the electrical characteristics of dielectric layers. The X-ray diffraction analyses revealed that the $500^{\circ}C-annealed\;HfO_2$ film remained to be amorphous, and the $600^{\circ}C-annealed\;HfO_2$ film was crystallized. The annealing treatment at $500^{\circ}C$ resulted in the highest capacitance and the lowest leakage current due to the reduction of defects in the $HfO_2$ films and non-crystallization. Our results suggest that post-annealing treatments are a critical factor in improving the characteristics of gate dielectric layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.3
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• pp.201-206
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• 2019

This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.38-42
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• 1999

Using the LOCOS process, we have fabricated the lateral type polysilicon field emission triodes with poly-Si/oxide/Si structure and investigated their current-voltage characteristics for three biasing modes of operation. The fabricated devices exhibit excellent electrical performances such as a relatively low turn-on anode voltage of 14 V at VGC = 0V, a stable and high emission current of 92${\mu}$A/triode over 90 hours, a small gate leakage current of 0.23 ${\mu}$A/triode and an outstanding transconductance of 57${\mu}$S/5triodes at VGC = 5V and VAC = 26V. these superior electrical operation is believed to be due to a large field enhancement effect, which is related to the sharp cathode tips produced by the LOCOS process as well as the high aspect ratio (height /radius ) of the cathode tip end.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.2
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• pp.69-74
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• 2016

In this study, we proposed an a-IGZO (amorphous In-Ga-Zn-O) TFT (thin-film transistor) with off-planed source/drain structure. Furthermore, two different electrode materials (ITO and Ti) were applied to the source and drain contacts for performance improvement of a-IGZO TFTs. When the ITO with a large work-function and the Ti with a small work-function are applied to drain electrode and source contact, respectively, the electrical performances of a-IGZO TFTs were improved; an increased driving current, a decreased leakage current, a high on-off current ratio, and a reduced subthreshold swing. As a result of gate bias stress test at various temperatures, the off-planed S/D a-IGZO TFTs showed a degradation mechanism due to electron trapping and both devices with ITO-drain or Ti-drain electrode revealed an equivalent instability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.40-40
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• 2009

The electrical characteristic of the conventional self-aligned polycrystalline silicon (poly-Si) TFTs are known to present several undesired effects such as large leakage current, kink effect and hot-carrier effects. In this paper, LTPS TFTs with different GOLDD length were fabricated and investigated the effect of the GOLDD. GOLDD length of 1, 1.5 and $2{\mu}m$ were used, while the thickness of the gate dielectrics($SiN_x/SiO_2$) was fixed at 65nm(40nm/25nm). The electrical characteristics show that the kink effect is reduced at the LTPS TFTs, and degradation from the hot-carrier effect was also decreased by increasing GOLDD length.

• ETRI Journal
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• v.30 no.2
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• pp.308-314
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• 2008

In this paper, we describe the fabrication of 3.5-inch QCIF active matrix organic light emitting display (AMOLED) panels driven by thin film transistors, which are produced by an ultra-low-temperature polycrystalline silicon process on plastic substrates. The over all processing scheme and technical details are discussed from the viewpoint of mechanical stability and display performance. New ideas, such as a new triple-layered metal gate structure to lower leakage current and organic layers for electrical passivation and stress reduction are highlighted. The operation of a 3.5-inch QCIF AMOLED is also demonstrated.