• Title/Summary/Keyword: overlap capacitance

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Lateral Channel Doping Profile Measurements Using Extraction Data of Drain Voltage-Dependent Gate-Bulk MOSFET Capacitance (드레인 전압 종속 게이트-벌크 MOSFET 캐패시턴스 추출 데이터를 사용한 측면 채널 도핑 분포 측정)

  • Choi, Min-Kwon;Kim, Ju-Young;Lee, Seong-Hearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.10
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    • pp.62-66
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    • 2011
  • In this study, a new RF method to extract the drain-source voltage Vds-dependent gate-bulk capacitance of deep-submicron MOSFETs is developed by determining Vds-independent gate-source overlap capacitance using measured S-parameters. The accuracy of extraction method is verified by observing good agreements between the measured and modeled S-parameters. The lateral channel doping profile in the drain region is experimentally measured using a Vds-dependent curve of the overlap and depletion length obtained from the extracted data.

Accuracy Analysis of Extraction Methods for Effective Channel Length in Deep-Submicron MOSFETs

  • Kim, Ju-Young;Choi, Min-Kwon;Lee, Seong-Hearn
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.2
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    • pp.130-133
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    • 2011
  • A comparative study of two capacitance methods to measure the effective channel length in deep-submicron MOSFETs has been made in detail. Since the reduction of the overlap capacitance in the accumulation region is smaller than the addition of the inner fringe capacitance at zero gate voltage, the capacitance method removing the parasitic capacitance in the accumulation region extracts a more accurate effective channel length than the method removing that at zero gate voltage.

Multi-point Flexible Touch Sensor Based on Capacitor Structure Using Thin Copper-Plated Polyimide Film for Textile Applications

  • Lee, Junheon;Kim, Taekyeong
    • Textile Coloration and Finishing
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    • v.31 no.2
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    • pp.65-76
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    • 2019
  • A multi-point touch input sensor having different sizes or different capacitance touch points connected by only one pair of signal transmission lines was fabricated using a polyimide film coated with a thin copper plate. The capacitance increases with the decrease in the number of sheets of fabric spacers placed between the two sheets of the polyimide film. Therefore, the touch input sensor could be manufactured without fabric spacers, which was possible by the action of the polyimide film as a dielectric material in the capacitor. On the multi-point touch sensor, higher capacitance was obtained when pressing wider-area touch points with 10mm to 25mm diameter on average. However, the capacitance of a system comprising two sheets of touch sensors was considerably low, causing a serious overlap of the capacitance values according to the data collected from the reliability test. Although the capacitance values could be increased by stacking several sheets of touch sensors, the overlap of data was still observed. After reducing the size of all touch points to 10mm and stacking up to eight sheets of sensors, reliable and consistent capacitance data was obtained. Five different capacitance signals could be induced in the sensors by pushing touch points simultaneously.

New SPICE Modeling for Bias-Dependent Gate-Drain Overlap Capacitance in RF MOSFETs (RF MOSFET의 바이어스 종속 게이트-드레인 오버렙 캐패시턴스의 새로운 SPICE 모델링)

  • Lee, Sangjun;Lee, Seonghearn
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.4
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    • pp.49-55
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    • 2015
  • The inaccuracy of the bias-dependent gate-drain overlap capacitance $C_{gdo}$ simulation in original BSIM4 and BSIM4 macro model using a diode is analyzed in detail. It is found that the accuracy of the macro model is better than of the BSIM4. However, the macro model cannot be used in the linear region. In order to remove the inaccuracy of the conventional models, a new BSIM4 macro model with a physical bias-dependent $C_{gdo}$ equation is proposed and its accuracy is validated in the full bias range.

A New Method for Artifact Reduction Based on Capacitive Sensor and Adaptive Filter in Oscillometric Blood Pressure Measurement (오실로메트릭 혈압 측정에서 커패시턴스 센서와 적응필터를 이용한 새로운 잡음제거방법에 관한 연구)

  • Choi, Hyun-Seok;Park, Ho-Dong;Lee, Kyoung-Joung
    • Journal of Biomedical Engineering Research
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    • v.29 no.3
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    • pp.239-248
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    • 2008
  • In this study, a new method using a capacitive sensor and an adaptive filter was proposed to deal with artifacts contaminating an oscillation signal in oscilometric blood pressure measurement. The proposed method makes use of a variation of the capacitance between an electrode fixed to a cuff and an external object to detect artifacts caused by the external object bumping into the cuff. The proposed method utilizes the adaptive filter based on linear prediction to remove the detected artifacts. The conventional method using linear interpolation and the proposed method using the adaptive filter were applied to three types of the artifact-contaminated oscillation signals(no overlap, non-consecutive overlap, and consecutive overlap between artifacts and oscillations) to compare them in terms of the artifact reduction performance. The proposed method was more robust than the conventional method in the case of consecutive overlap between artifacts and oscillations. The proposed method could be useful for measuring blood pressure in such a noisy environment that the subject is being transported.

Trench Power MOSFET using Separate Gate Technique for Reducing Gate Charge (Gate 전하를 감소시키기 위해 Separate Gate Technique을 이용한 Trench Power MOSFET)

  • Cho, Doohyung;Kim, Kwangsoo
    • Journal of IKEEE
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    • v.16 no.4
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    • pp.283-289
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    • 2012
  • In this paper, We proposed Separate Gate Technique(SGT) to improve the switching characteristics of Trench power MOSFET. Low gate-to-drain 전하 (Miller 전하 : Qgd) has to be achieved to improve the switching characteristics of Trench power MOSFET. A thin poly-silicon deposition is processed to form side wall which is used as gate and thus, it has thinner gate compared to the gate of conventional Trench MOSFET. The reduction of the overlapped area between the gate and the drain decreases the overlapped charge, and the performance of the proposed device is compared to the conventional Trench MOSFET using Silvaco T-CAD. Ciss(input capacitance : Cgs+Cgd), Coss(output capacitance : Cgd+Cds) and Crss(reverse recovery capacitance : Cgd) are reduced to 14.3%, 23% and 30% respectively. To confirm the reduction effect of capacitance, the characteristics of inverter circuit is comprised. Consequently, the reverse recovery time is reduced by 28%. The proposed device can be fabricated with convetional processes without any electrical property degradation compare to conventional device.

Parameter Extraction for BSIM3v3 RF Macro Model (BSIM3v3 RF Macro Model의 파라미터 추출)

  • Choi, Mun-Sung;Lee, Yong-Taek;Kim, Joung-Hyck;Lee, Seong-Hearn
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.671-674
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    • 2005
  • The series parasitic resistances ($R_s$, $R_g$, $R_d$, $R_{sub}$) of BSIM3v3 RF MOSFET macro model were directly extracted from measured S-parameters in the GHz region by using simple 2-port parameter equations. Also, overlap capacitance and junction capacitance parameters were extracted by tuning $S_{11}$, $S_{12}$, and $S_{22}$ respectively while DC-parameters and all parasitic resistances are fixed at previously extracted values. These data are verified to be accurate by observing good correspondence between modeled and measured S-parameters up to 10GHz.

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Downscaling of self-aligned inkjet printed polymer thin film transistors

  • Noh, Yong-Young;Sirringhaus, Henning
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1564-1567
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    • 2008
  • We demonstrate here a self-aligned printing approach that allows downscaling of printed organic thin-film transistors to channel lengths of 100 - 400 nm. A perfected down-scaled polymer transistors (L= 200 nm) showing high transition frequency over 1.5 Mhz were realized with thin polymer dielectrics, controlling contact resistance, and minimizing overlap capacitance via self-aligned gate configuration.

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Fabrication of Charge-pump Active-matrix OLED Display Panel with 64 ${\times}$ 64 Pixels

  • Na, Se-Hwan;Shim, Jae-Hoon;Kwak, Mi-Young;Seo, Jong-Wook
    • Journal of Information Display
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    • v.7 no.1
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    • pp.35-40
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    • 2006
  • Organic light-emitting diode (OLED) display panel using the charge-pump (CP) pixel addressing scheme was fabricated, and the results show that it is applicable for information display. A CP-OLED panel with 64 ${\times}$ 64 pixels consisting of thin-film capacitors and amorphous silicon Schottky diodes was fabricated using conventional thin-film processes. The pixel drive circuit passes electrical current into the OLED cell during most of the frame period as in the thin-film transistor (TFT)-based active-matrix (AM) OLED displays. In this study, the panel was operated at a voltage level of below 4 V, and this operation voltage can be reduced by eliminating the overlap capacitance between the column bus line and the common electrode.

A Self-Aligned Metal Gate MOSFET Structure Utilizing The Oxidation Rate Variation on The Impurity Concentration (불순물 농도에 따른 산화막 성장률의 차이를 이용한 자기 정렬된 금속게이트 MOSFET 구조)

  • 고요환;최진호;김충기
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.36 no.7
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    • pp.462-469
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    • 1987
  • A metal gate MOSFET with source/drain regions self-aligned to gate region is proposed. The proposed MOS transistor is fabricated by utilizing the higher oxidation rate of source/drain regions with high doping concentration when compared with channel region with moderate doping. The thick oxide on the source/drain regions reduces the gate and drain(source) overlap capacitance down to that of a self-aligned polysilicon gate device while allowing the use of a metal gate with much lower resistivity than the more commonly used polycrystalline silicon. A ring oscillator composed of 15 inverter stages has been computer simulated using SPICE. The results of the simulation show good agreement with experimental measurement confirming the fast switching speed of propesed MOSFET.

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