Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Lateral Channel Doping Profile Measurements Using Extraction Data of Drain Voltage-Dependent Gate-Bulk MOSFET Capacitance

드레인 전압 종속 게이트-벌크 MOSFET 캐패시턴스 추출 데이터를 사용한 측면 채널 도핑 분포 측정

  • Choi, Min-Kwon (Department of Electronics Engineering, Hankuk University of Foreign Studies) ;
  • Kim, Ju-Young (Department of Electronics Engineering, Hankuk University of Foreign Studies) ;
  • Lee, Seong-Hearn (Department of Electronics Engineering, Hankuk University of Foreign Studies)
  • 최민권 (한국외국어대학교 전자공학과) ;
  • 김주영 (한국외국어대학교 전자공학과) ;
  • 이성현 (한국외국어대학교 전자공학과)
  • Received : 2011.03.22
  • Accepted : 2011.10.22
  • Published : 2011.10.25
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Abstract

In this study, a new RF method to extract the drain-source voltage Vds-dependent gate-bulk capacitance of deep-submicron MOSFETs is developed by determining Vds-independent gate-source overlap capacitance using measured S-parameters. The accuracy of extraction method is verified by observing good agreements between the measured and modeled S-parameters. The lateral channel doping profile in the drain region is experimentally measured using a Vds-dependent curve of the overlap and depletion length obtained from the extracted data.

본 연구에서는 측정된 S-파라미터를 사용하여 드레인-소스 전압 Vds에 무관한 게이트-소스 overlap 캐패시턴스를 추출하고, 이를 바탕으로 deep-submicron MOSFET의 Vds 종속 게이트-벌크 캐패시턴스 곡선을 추출하는 RF 방법이 새롭게 개발 되었다. 추출된 캐패시턴스 값들을 사용한 등가회로 모델과 측정된 데이터가 잘 일치하는 것을 관찰함으로써 추출방법의 정확도가 검증되었다. 추출된 데이터로부터 overlap과 depletion 길이의 Vds 종속 곡선이 얻어졌으며, 이를 통해 drain 영역의 채널 도핑 분포를 실험적으로 측정하였다.

Keywords

References

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