• Title/Summary/Keyword: SPICE parameter

Search Result 43, Processing Time 0.025 seconds

The Study on the SPICE Model Parameter Extraction Method for the Schottky Diode Under DC Forward Bias (DC 순방향 바이어스 인가조건에서 Schottky 다이오드의 SPICE 모델 파라미터 추출 방법에 관한 연구)

  • Lee, Un-Gu
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.65 no.3
    • /
    • pp.439-444
    • /
    • 2016
  • The method for extracting the SPICE model parameter of Schottky diode under DC forward bias is proposed. A method for improving the accuracy of the SPICE model parameter at various temperatures is proposed. Three analysis steps according to the magnitude of the current is used in order to extract the parameters effectively. At each analysis step, initial parameters are calculated by using the current-voltage equations and the Levenberg-Marquardt analysis is proceeded. To verify the validity of the proposed method, the SPICE model parameters for the BAT45 and FSV1045 under DC forward bias is extracted. Schottky diode currents obtained from the proposed method shows the average relative error of 6.1% and 9% compared with the measured data for the BAT45 and FSV1045 sample at various temperatures.

A Study on the SPICE Model Parameter Extraction Method for the BJT DC Model (BJT의 DC 해석 용 SPICE 모델 파라미터 추출 방법에 관한 연구)

  • Lee, Un-Gu
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.58 no.9
    • /
    • pp.1769-1774
    • /
    • 2009
  • An algorithm for extracting the BJT DC model parameter values for SPICE model is proposed. The nonlinear optimization method for analyzing the device I-V data using the Levenberg-Marquardt algorithm is proposed and the method for calculating initial conditions of model parameters to improve the convergence characteristics is proposed. The base current and collector current obtained from the proposed method shows the root mean square error of 6.04% compared with the measured data of the PNP BJT named 2SA1980.

A Study on the SPICE Model Parameter Extraction Method for the DC Model of the High Voltage MOSFET (High Voltage MOSFET의 DC 해석 용 SPICE 모델 파라미터 추출 방법에 관한 연구)

  • Lee, Un-Gu
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.60 no.12
    • /
    • pp.2281-2285
    • /
    • 2011
  • An algorithm for extracting SPICE MOS level 2 model parameters for the high voltage MOSFET DC model is proposed. The optimization method for analyzing the nonlinear data of the current-voltage curve using the Gauss-Newton algorithm is proposed and the pre-process step for calculating the threshold voltage and the mobility is proposed. The drain current obtained from the proposed method shows the maximum relative error of 5.6% compared with the drain current of 2-dimensional device simulation for the high voltage MOSFET.

SPICE Parameter Extraction for the IGBT (IGBT의 SPICE 파라미터 추출)

  • 김한수;조영호;최성동;최연익;한민구
    • The Transactions of the Korean Institute of Electrical Engineers
    • /
    • v.43 no.4
    • /
    • pp.607-612
    • /
    • 1994
  • The static and dynamic model of IGBT for the SPICE simulation has been successfully developed. The various circuit model parameters are extracted from the I-V and C-V characteristics of IGBT and implemented into our model. The static model of IGBT consists of the MOSFET, bipolar transistor and series resistance. The parameters to be extracted are the threshold voltage of MOSFET, current gain $\beta$ of bipolar transistor, and the series resistance. They can be extracted from the measured I-V characteristics curve. The C-V characteristics between the terminals are very important parameters to determine the turn-on and turn-off waveform. Especially, voltage dependent capacitance are polynomially approximated to obtain the exact turn-on and turn-off waveforms. The SPICE simulation results employing new model agree well with the experimental values.

  • PDF

SPICE Modeling for Thermoelectric Modules (열전 모듈의 SPICE 모델링)

  • Park, Soon-Seo;Cho, Sung-Kyu;Baatar, Nyambayar;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.4
    • /
    • pp.7-12
    • /
    • 2010
  • We have developed a SPICE compatible model of thermoelectric devices, and a parameter extracting technique only by electrical and temperature measurement by using Harman method was proposed. The proposed model and parameter extraction technique do not require experimental data from thermal conductivity measurements. The maximum error between extracted parameters extracted by proposed method and conventional method was about 14%, which is not a severe mismatch for real application. The proposed model is applicable to design of both for thermoelectric coolers and thermo electric generators.

Characteristic Analysis of LDO Regulator According to Process Variation (공정변화에 따른 LDO 레귤레이터의 특성 분석)

  • Park, Won-Kyeong;Kim, Ji-Man;Heo, Yun-Seok;Park, Yong-Su;Song, Han-Jung
    • 전자공학회논문지 IE
    • /
    • v.48 no.4
    • /
    • pp.13-18
    • /
    • 2011
  • In this paper, we have examined electrical characteristics of LDO regulator according to the process variation using a 1 ${\mu}m$ 20 V high voltage CMOS process. The electrical analysis of LDO regulator have been performed with three kind of SPICE parameter sets (Typ : typical, FF : fast, SS : slow) by process variation which cause change of SPICE parameter such as threshold voltage and effective channel length of MOS devices. From simulation results, we confirmed that in case of SS type SPICE parameter set, the LDO regulator has 3.6 mV/V line regulation, 0.4 mV/mA load regulation and 0.86 ${\mu}s$ output voltage settling time. And in case of Typ type SPICE parameter set, the LDO regulatorhas 4.2 mV/V line regulation, 0.44 mV/mA load regulation and 0.62 ${\mu}s$ output voltage settling time. Finally, in the FF type SPICE parameter set, the LDO regulator has 7.0 mV/V line regulation, 0.56 mV/mA load regulation and 0.27 ${\mu}s$ output voltage settling time.

Drain Induced Barrier Lowering(DIBL) SPICE Model for Sub-10 nm Low Doped Double Gate MOSFET (10 nm 이하 저도핑 DGMOSFET의 SPICE용 DIBL 모델)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.21 no.8
    • /
    • pp.1465-1470
    • /
    • 2017
  • In conventional MOSFETs, the silicon thickness is always larger than inversion layer, so that the drain induced barrier lowering (DIBL) is expressed as a function of oxide thickness and channel length regardless of silicon thickness. However, since the silicon thickness is fully depleted in the sub-10 nm low doped double gate (DG) MOSFET, the conventional SPICE model for DIBL is no longer available. Therefore, we propose a novel DIBL SPICE model for DGMOSFETs. In order to analyze this, a thermionic emission and the tunneling current was obtained by the potential and WKB approximation. As a result, it was found that the DIBL was proportional to the sum of the top and bottom oxide thicknesses and the square of the silicon thickness, and inversely proportional to the third power of the channel length. Particularly, static feedback coefficient of SPICE parameter can be used between 1 and 2 as a reasonable parameter.

The Development of the Interface Tool for the Designing of Motor Drive Using Spice (Motor Drive 설계를 위한 Spice 용 Interface Tool 제작)

  • 이상용;고재석;목형수;최규하;최홍순;김덕근
    • Proceedings of the KIPE Conference
    • /
    • 1998.11a
    • /
    • pp.68-72
    • /
    • 1998
  • The parameter through the motor designing program is used to predict motor response and design the motor drive circuits. The application programs such as "Saber" are often used for these. However, making the electrical model of motor for these simulation tool is uncomfortable and impossible for general users. Therefore, in this paper, we develop the "Spice" library generation program with the motor designing program "Motor Expert". This program will assist the user to make the motor library comfortablely and correctlyry comfortablely and correctly

  • PDF

New Approach for Transient Radiation SPICE Model of CMOS Circuit

  • Jeong, Sang-Hun;Lee, Nam-Ho;Lee, Jong-Yeol;Cho, Seong-Ik
    • Journal of Electrical Engineering and Technology
    • /
    • v.8 no.5
    • /
    • pp.1182-1187
    • /
    • 2013
  • Transient radiation is emitted during a nuclear explosion and causes fatal errors as upset and latch-up in CMOS circuits. This paper proposes the transient radiation SPICE models of NMOS, PMOS, and INVERTER based on the transient radiation analysis using TCAD (Technology Computer Aided Design). To make the SPICE model of a CMOS circuit, the photocurrent in the PN junction of NMOS and PMOS was replaced as current source, and a latch-up phenomenon in the inverter was applied using a parasitic thyristor. As an example, the proposed transient radiation SPICE model was applied to a CMOS NAND circuit. The CMOS NAND circuit was simulated by SPICE and TCAD using the 0.18um CMOS process model parameter. The simulated results show that the SPICE results were similar to the TCAD simulation and the test results of commercial CMOS NAND IC. The simulation time was reduced by 120 times compared to the TCAD simulation.

Prediction of the transient response of the IGBT using the Spice parameter (Spice parameter를 이용한 IGBT의 과도응답 예측)

  • 이효정;홍신남
    • Proceedings of the IEEK Conference
    • /
    • 1998.10a
    • /
    • pp.815-818
    • /
    • 1998
  • The Insulated Gate Bipolar Transistor has the characteristics of MOSFET and BJT. The characteristics of proposed device exhibit high speed switching, the voltage controlled property, and the low ON resistance. This hybrid device has been used and developed continuously in the power electronic engineering field. We can simulate many IGBT circuits, such as the motor drive circuit, the switching circuits etc, with PSpice. However, some problems in PSpice is that the IGBT is old-fashioned and is very difficult to get it. In this paper, the IGBT in PSpice is considered as the basic structure. We changed the valuse of base width, gate-drain overlaping area, device area, and doping concentration, then calculated MOS transconductance, ambipolar recombination lifetime etc. Using this resultant parameter, we could predict the transient response characteristicsof IGBT, for examplex, voltage overshoot, the rising curve of voltage, and the falling curve of current.

  • PDF