• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.8
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• pp.1465-1470
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• 2017

In conventional MOSFETs, the silicon thickness is always larger than inversion layer, so that the drain induced barrier lowering (DIBL) is expressed as a function of oxide thickness and channel length regardless of silicon thickness. However, since the silicon thickness is fully depleted in the sub-10 nm low doped double gate (DG) MOSFET, the conventional SPICE model for DIBL is no longer available. Therefore, we propose a novel DIBL SPICE model for DGMOSFETs. In order to analyze this, a thermionic emission and the tunneling current was obtained by the potential and WKB approximation. As a result, it was found that the DIBL was proportional to the sum of the top and bottom oxide thicknesses and the square of the silicon thickness, and inversely proportional to the third power of the channel length. Particularly, static feedback coefficient of SPICE parameter can be used between 1 and 2 as a reasonable parameter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.7-12
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• 2007

A SPICE-based 3-dimensional circuit model of LED(Light-Emitting Diode) was developed for the design optimization and analysis of high-brightness LEDs. An LED is represented as an array of pixel LEDs with small preassigned areas, and each of the pixel LEDs is composed of circuit networks representing the thin-film layers(n-metal, n- and p-type semiconductor layers, and p-metal), ohmic contacts, and pn-junctions. Each of the thin-film layers and contact resistances is modeled by a resistance network, and the pn-junction is modeled by a conventional pn-junction diode. It has been found that the simulation results using the model and the corresponding parameters precisely fit the measured LED characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.92-97
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• 2013

In this paper the author proposes a method of implementing a numerical model for threshold voltage ($V_{th}$) shift in organic thin-film transistors (OTFTs) into SPICE tools. $V_{th}$ shift is first numerically modeled by dividing the shift into sequentially ordered groups. The model is then used to derive a simulations model which takes into simulation parameters and calculation complexity. Finally, the numerical and simulation models are implemented in AIM-SPICE. The SPICE simulation results agree well with the $V_{th}$ shift obtained from an OTFT fabricated without any optimization. The proposed method is also used to implement the stretched-exponential time dependent $V_{th}$ shift in AIM-SPICE and the results show the proposed method is applicable to various types of $V_{th}$ shifts.

• 전자공학회논문지 IE
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• v.46 no.4
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• pp.8-15
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• 2009

In this paper, we are indicated CMOS Image sensor circuit SPICE analysis for the Photo Diode and pixel Modeling. We get a characteristic of the photoelectric current using a device simulator Medici and develop the Photodiode model for applying a SPICE simulation. For verifying the result, We compared the result of SPICE simulation with the result of mixed mode simulation about the testing circuit structure consisted photodiode and NMOS.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.153-161
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• 2011

In this work, we report the physics-based SPICE model of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) and demonstrate the SPICE simulation of amorphous InGaZnO (a-IGZO) TFT inverter by using Verilog-A. As key physical parameter, subgap density-of-states (DOS) is extracted and used for calculating the electric potential, carrier density, and mobility along the depth direction of active thin-film. It is confirmed that the proposed DOS-based SPICE model can successfully reproduce the voltage transfer characteristic of a-IGZO inverter as well as the measured I-V characteristics of a-IGZO TFTs within the average error of 6% at $V_{DD}$=20 V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.6
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• pp.91-98
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• 2004

This paper proposes a PCB plane model for generic SPICE circuit simulators. The proposed model reflects two frequency-dependent losses, namely skin and dielectric losses. After power/ground plane pair is divided into arrays of unit-cells, each unit-cell is modeled using a transmission line and two loss models. The loss model is composed of a resistor for DC loss, series HL ladder circuit for skin loss and series RC ladder circuit for dielectric loss. To verify the validity of the proposed model, it is compared with SPICE ac analysis using frequency-dependent resistors. Also, we show that the estimation results using the proposed model have a good correlation with that of VNA measurement for the typical PCB stack-up structure of general desktop PCs. With the proposed model, not only ac analysis but also transient analysis can be easily done for circuits including various non-linear/linear devices since the model consists of passive elements onl.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.1-12
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• 2003

In this study, a regime where independent treatment of SETs in transient simulations is valid has been identified quantitatively. It is found that as in the steady-state case, each SET can be treated independently even in the transient case when the interconnection capacitance is large enough. However, the value of the load capacitance $C_{L}$of the interconnections for the independent treatment of SETs is approximately 10 times larger than that of the steady state case. A compact SET transient model is developed for transient circuit simulation by SPICE. The developed model is based on a linearized equivalent circuit and the solution of master equation is done by the programming capabilities of the SmartSpice. Exact delineation of several simulation time scales and the physics-based compact model make it possible to accurately simulate hybrid circuits in the time scales down to several tens of pico seconds. The simulation time is also shown to depend on the complexity level of the transient model.l.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.173-178
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• 2012

Using accurate MOSFET substrate parameters obtained by a RF direct extraction method, it is demonstrated that a BSIM4 model with only substrate resistances is not physically valid to apply in the wide range of gate length because of scaling inaccuracy. In order to remove the unphysical problem of the BSIM4, a modified BSIM4 model with additional dielectric substrate capacitance is used and its physical validity is verified by observing excellent gate length scalability.

• Journal of Sensor Science and Technology
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• v.22 no.1
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• pp.44-48
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• 2013

For a successful commercialization of microbolometer, it is required to develop a robust package including thermal stabilizing mechanism. In order to regulate the temperature within some operating range, thermoelectric cooler is generally used but it's not easy to model the whole package due to the coupled physics nature of thermoelectric cooler. In this paper, SPICE-compatible modeling methodology of a microbolometer package is presented, whose steady-state results matched well with FEM results at the maximum difference of 5.95%. Although the time constant difference was considerable as 15.7%, it can be offset by the quite short simulation time compared to FEM simulation. The developed model was also proven to be useful for designing the thermal stabilizer through parametric and transient analyses under the various working conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1985-1991
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• 1999

In this paper, complete and general two-port lumped Spice-network model is developed for a lossy transmission line. This model is realized as a Spice subcircuit, by means of standard lumped network elements and mathematical functions. It is used as a component in the time-domain simulation of a high-speed data transmission line such as IMI(Inter Module Interface) data path in HANbit ACE 64 ATM switching system. The only required Spice network elements are resistance and frequency-dependent controlled-voltage sources. Such frequency-dependent sources are realized by utilizing the standard Hspice mathematical functions FREQ, DELAY, and POLY.