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Transient Modeling of Single-Electron Transistors for Circuit Simulation  

유윤섭 (한경대학교 정보제어공학과)
김상훈 (한경대학교 정보제어공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.40, no.4, 2003 , pp. 1-12 More about this Journal
Abstract
In this study, a regime where independent treatment of SETs in transient simulations is valid has been identified quantitatively. It is found that as in the steady-state case, each SET can be treated independently even in the transient case when the interconnection capacitance is large enough. However, the value of the load capacitance $C_{L}$of the interconnections for the independent treatment of SETs is approximately 10 times larger than that of the steady state case. A compact SET transient model is developed for transient circuit simulation by SPICE. The developed model is based on a linearized equivalent circuit and the solution of master equation is done by the programming capabilities of the SmartSpice. Exact delineation of several simulation time scales and the physics-based compact model make it possible to accurately simulate hybrid circuits in the time scales down to several tens of pico seconds. The simulation time is also shown to depend on the complexity level of the transient model.l.
Keywords
SPICE;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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