• Title/Summary/Keyword: Double Gate (DG)

Search Result 115, Processing Time 0.029 seconds

Analysis of Threshold Voltage Roll-off for Ratio of Channel Length and Thickness in DGMOSFET (DGMOSFET에서 채널길이와 두께 비에 따른 문턱전압변화분석)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.10
    • /
    • pp.2305-2309
    • /
    • 2010
  • In this paper, the variations of threshold voltage characteristics for ratio of channel length and thickness have been alanyzed for DG(Double Gate)MOSFET having top gate and bottom gate. Since the DGMOSFET has two gates, it has advantages that contollability of gate for current is nearly twice and SCE(Short Channel Effects) shrinks in nano devices. The channel length and thickness in MOSFET determines device size and extensively influences on SCEs. The threshold voltage roll-off, one of the SCEs, is large with decreasing channel length. The threshold voltage roll-off and drain induced barrier lowing have been analyzed with various ratio of channel length and thickness for DGMOSFET in this study.

Analysis of Threshold Voltage Roll-off for Ratio of Channel Length and Thickness in DGMOSFET (DGMOSFET에서 채널길이와 두께 비에 따른 문턱전압변화분석)

  • Jung, Hak-Kee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2010.05a
    • /
    • pp.765-767
    • /
    • 2010
  • In this paper, the variations of threshold voltage characteristics for ratio of channel length and thickness have been alanyzed for DG(Double Gate)MOSFET having top gate and bottom gate. Since the DGMOSFET has two gates, it has advantages that contollability of gate for current is nearly twice and SCE(Short Channel Effects) shrinks in nano devices. The channel length and thickness in MOSFET determines device size and extensively influences on SCEs. The threshold voltage roll-off, one of the SCEs, is large with decreasing channel length. The threshold voltage roll-off has been analyzed with various ratio of channel length and thickness for DGMOSFET in this study.

  • PDF

Improvement of Electrical Characteristics in Double Gate a-IGZO Thin Film Transistor

  • Lee, Hyeon-U;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2016.02a
    • /
    • pp.311-311
    • /
    • 2016
  • 최근 고성능 디스플레이 개발이 요구되면서 기존 비정질 실리콘(a-Si)을 대체할 산화물 반도체에 대한 연구 관심이 급증하고 있다. 여러 종류의 산화물 반도체 중 a-IGZO (amorphous indium-gallium-zinc oxide)가 높은 전계효과 이동도, 저온 공정, 넓은 밴드갭으로 인한 투명성 등의 장점을 가지며 가장 연구가 활발하게 보고되고 있다. 기존에는 SG(단일 게이트) TFT가 주로 제작 되었지만 본 연구에서는 DG(이중 게이트) 구조를 적용하여 고성능의 a-IGZO 기반 박막 트랜지스터(TFT)를 구현하였다. SG mode에서는 하나의 게이트가 채널 전체 영역을 제어하지만, double gate mode에서는 상, 하부 두 개의 게이트가 동시에 채널 영역을 제어하기 때문에 채널층의 형성이 빠르게 이루어지고, 이는 TFT 스위칭 속도를 향상시킨다. 또한, 상호 모듈레이션 효과로 인해 S.S(subthreshold swing)값이 낮아질 뿐만 아니라, 상(TG), 하부 게이트(BG) 절연막의 계면 산란 현상이 줄어들기 때문에 이동도가 향상되고 누설전류 감소 및 안정성이 향상되는 효과를 얻을 수 있다. Dual gate mode로 동작을 시키면, TG(BG)에는 일정한 positive(or negative)전압을 인가하면서 BG(TG)에 전압을 가해주게 된다. 이 때, 소자의 채널층은 depletion(or enhancement) mode로 동작하여 다른 전기적인 특성에는 영향을 미치지 않으면서 문턱 전압을 쉽게 조절 할 수 있는 장점도 있다. 제작된 소자는 p-type bulk silicon 위에 thermal SiO2 산화막이 100 nm 형성된 기판을 사용하였다. 표준 RCA 클리닝을 진행한 후 BG 형성을 위해 150 nm 두께의 ITO를 증착하고, BG 절연막으로 두께의 SiO2를 300 nm 증착하였다. 이 후, 채널층 형성을 위하여 50 nm 두께의 a-IGZO를 증착하였고, 소스/드레인(S/D) 전극은 BG와 동일한 조건으로 ITO 100 nm를 증착하였다. TG 절연막은 BG 절연막과 동일한 조건에서 SiO2를 50 nm 증착하였다. TG는 S/D 증착 조건과 동일한 조건에서, 150 nm 두께로 증착 하였다. 전극 물질과, 절연막 물질은 모두 RF magnetron sputter를 이용하여 증착되었고, 또한 모든 patterning 과정은 표준 photolithography, wet etching, lift-off 공정을 통하여 이루어졌다. 후속 열처리 공정으로 퍼니스에서 질소 가스 분위기, $300^{\circ}C$ 온도에서 30 분 동안 진행하였다. 결과적으로 $9.06cm2/V{\cdot}s$, 255.7 mV/dec, $1.8{\times}106$의 전계효과 이동도, S.S, on-off ratio값을 갖는 SG와 비교하여 double gate mode에서는 $51.3cm2/V{\cdot}s$, 110.7 mV/dec, $3.2{\times}108$의 값을 나타내며 훌륭한 전기적 특성을 보였고, dual gate mode에서는 약 5.22의 coupling ratio를 나타내었다. 따라서 산화물 반도체 a-IGZO TFT의 이중게이트 구조는 우수한 전기적 특성을 나타내며 차세대 디스플레이 시장에서 훌륭한 역할을 할 것으로 기대된다.

  • PDF

Analysis of Subthreshold Current Deviation for Channel Doping of Double Gate MOSFET (이중게이트 MOSFET의 채널도핑에 다른 문턱전압이하 전류 변화 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.6
    • /
    • pp.1409-1413
    • /
    • 2013
  • This paper analyzed the change of subthreshold current for channel doping concentration of double gate(DG) MOSFET. Poisson's equation had been used to analyze the potential distribution in channel, and Gaussian function had been used as carrier distribution. The potential distribution was obtained as the analytical function of channel dimension, using the boundary condition. The subthreshold current had been analyzed for channel doping concentration, and projected range and standard projected deviation of Gaussian function. Since this analytical potential model was verified in the previous papers, we used this model to analyze the subthreshold current. As a result, we know the subthreshold current was influenced on parameters of Gaussian function and channel doping concentration for DGMOSFET.

Relation of Breakdown Voltage and Channel Doping Concentration of Sub-10 nm Double Gate MOSFET (10 nm 이하 DGMOSFET의 항복전압과 채널도핑농도의 관계)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.21 no.6
    • /
    • pp.1069-1074
    • /
    • 2017
  • Reduction of breakdown voltage is serious short channel effect (SCE) by shrink of channel length. The deviation of breakdown voltage for doping concentration is investigated with structural parameters of sub-10 nm double gate (DG) MOSFET in this paper. To analyze this, thermionic and tunneling current are derived from analytical potential distribution, and breakdown voltage is defined as drain voltage when the sum of two currents is $10{\mu}A$. As a result, breakdown voltage increases with increase of doping concentration. Breakdown voltage decreases by reduction of channel length. In order to solve this problem, it is found that silicon and oxide thicknesses should be kept very small. In particular, as contributions of tunneling current increases, breakdown voltage increases.

Dependence of Drain Induced Barrier Lowering for Doping Profile of Channel in Double Gate MOSFET (이중게이트 MOSFET에서 채널내 도핑분포에 대한 드레인유기장벽감소 의존성)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.15 no.9
    • /
    • pp.2000-2006
    • /
    • 2011
  • In this paper, the drain induced barrier lowering(DIBL) for doping distribution in the channel has been analyzed for double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studing because of adventages to be able to reduce the short channel effects(SCEs) to occur in convensional MOSFET. DIBL is SCE known as reduction of threshold voltage due to variation of energy band by high drain voltage. This DIBL has been analyzed for structural parameter and variation of channel doping profile for DGMOSFET. For this object, The analytical model of Poisson equation has been derived from Gaussian doping distribution for DGMOSFET. To verify potential and DIBL models based on this analytical Poisson's equation, the results have been compared with those of the numerical Poisson's equation, and DIBL for DGMOSFET has been investigated using this models.

Doping Profile Dependent Subthreshold Swing for Double Gate MOSFET (DGMOSFET에서 문턱전압이하 스윙의 도핑분포 의존성)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.15 no.8
    • /
    • pp.1764-1770
    • /
    • 2011
  • In this paper, the subthreshold swings for doping distribution in the channel have been analyzed in double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studying since it can lessen the short channel effects(SCEs) as next -generation nano device. The degradation of subthreshold swing(SS) known as SCEs has greatly influenced on application of digital devices, and has been analyzed for structural parameter and variation of channel doping profile in DGMOSFET. The analytical model of Poisson equation has been derived from nonuniform doping distribution for DGMOSFET. To verify potential and subthreshold swing model based on this analytical Poisson's equation, the results have been compared with those of the numerical Poisson's equation, and subthreshold swing for DGMOSFET has been analyzed using these models.

Drain Induced Barrier Lowering(DIBL) SPICE Model for Sub-10 nm Low Doped Double Gate MOSFET (10 nm 이하 저도핑 DGMOSFET의 SPICE용 DIBL 모델)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.21 no.8
    • /
    • pp.1465-1470
    • /
    • 2017
  • In conventional MOSFETs, the silicon thickness is always larger than inversion layer, so that the drain induced barrier lowering (DIBL) is expressed as a function of oxide thickness and channel length regardless of silicon thickness. However, since the silicon thickness is fully depleted in the sub-10 nm low doped double gate (DG) MOSFET, the conventional SPICE model for DIBL is no longer available. Therefore, we propose a novel DIBL SPICE model for DGMOSFETs. In order to analyze this, a thermionic emission and the tunneling current was obtained by the potential and WKB approximation. As a result, it was found that the DIBL was proportional to the sum of the top and bottom oxide thicknesses and the square of the silicon thickness, and inversely proportional to the third power of the channel length. Particularly, static feedback coefficient of SPICE parameter can be used between 1 and 2 as a reasonable parameter.

Influence on Short Channel Effects by Tunneling for Nano structure Double Gate MOSFET (나노구조 이중게이트 MOSFET에서 터널링이 단채널효과에 미치는 영향)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.10 no.3
    • /
    • pp.479-485
    • /
    • 2006
  • The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.

Analysis on Forward/Backward Current Distribution and Off-current for Doping Concentration of Double Gate MOSFET (DGMOSFET의 도핑분포에 따른 상 · 하단 전류분포 및 차단전류 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.10
    • /
    • pp.2403-2408
    • /
    • 2013
  • This paper has analyzed the change of forward and backward current for channel doping concentration to analyze off-current of double gate(DG) MOSFET. The Gaussian function as channel doping distribution has been used to compare with experimental ones, and the two dimensional analytical potential distribution model derived from Poisson's equation has been used to analyze the off-current. The off-current has been analyzed for the change of projected range and standard projected range of Gaussian function with device parameters such as channel length, channel thickness, gate oxide thickness and channel doping concentration. As a result, this research shows the off-current has greatly influenced on forward and backward current for device parameters, especially for the shape of Gaussian function for channel doping concentration.