• Title/Summary/Keyword: Channel Doping Concentration

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A Study on Breakdown Voltage of GaAs Power MESFET's (GaAs Power MESFET의 항복전압에 관한 연구)

  • 김한수;김한구;박장우;기현철;박광민;손상희;곽계달
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.7
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    • pp.1033-1041
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    • 1990
  • In this paper, under pinch-off conditions, the gate-drain breakdown voltage characteristics of GaAs Power MESFET's as a function of device parameters such as channel thickness, doping concentration, gate length etc. are analyzed. Using the Green's function, the gate ionic charge induced by the depleted channel ionic charge is calculated. The impact ionization integral by avalanche multiplication between gate and drain is used to investigate breakdown phenomena. Especially, the localized excess surface charge effect as well as the uniform surface charge effect on breakdown voltage is considered.

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An Experimental Study on the Threshold Voltage and Punchthrough Voltage Reduction in Short-Channel NMOS Transistors (채널의 길이가 짧은 NMOS 트랜지스터의 Threshold 전압과 Punchthrough 전압의 감소에 관한 실험적연구)

  • Lee, Won-Sik;Im, Hyeong-Gyu;Kim, Bo-U
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.2
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    • pp.1-6
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    • 1983
  • The reduction of threshold voltage and punchthrough voltage of short channel MOS transistors has been measured experimentally with silicon gate NMOS transistors. The effects of the gate oxide thickness and substrate doping concentration on the threshold voltage and punch-through voltage have also been measured with sample devices with boron implantation and gate oxide thickness of 50 nm and 70 nm. Hot electron emission has been measured by floating gate method for the samples with 3 ${\mu}{\textrm}{m}$ channel length. It has been concluded from this measurement that hot electron emission is not significant for the channel length of 3${\mu}{\textrm}{m}$.

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Dependence of Drain Induced Barrier Lowering for Ratio of Channel Length vs. Thickness of Asymmetric Double Gate MOSFET (비대칭 DGMOSFET에서 채널길이와 두께 비에 따른 DIBL 의존성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.6
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    • pp.1399-1404
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    • 2015
  • This paper analyzed the phenomenon of drain induced barrier lowering(DIBL) for the ratio of channel length vs. thickness of asymmetric double gate(DG) MOSFET. DIBL, the important secondary effect, is occurred for short channel MOSFET in which drain voltage influences on potential barrier height of source, and significantly affects on transistor characteristics such as threshold voltage movement. The series potential distribution is derived from Poisson's equation to analyze DIBL, and threshold voltage is defined by top gate voltage of asymmetric DGMOSFET in case the off current is 10-7 A/m. Since asymmetric DGMOSFET has the advantage that channel length and channel thickness can significantly minimize, and short channel effects reduce, DIBL is investigated for the ratio of channel length vs. thickness in this study. As a results, DIBL is greatly influenced by the ratio of channel length vs. thickness. We also know DIBL is greatly changed for bottom gate voltage, top/bottom gate oxide thickness and channel doping concentration.

Analysis of Transport Characteristics for Double Gate MOSFET using Analytical Current-Voltage Model (해석학적 전류-전압모델을 이용한 이중게이트 MOSFET의 전송특성분석)

  • Jung Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.9
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    • pp.1648-1653
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    • 2006
  • In this paper, transport characteristics have been investigated using analytical current-voltage model for double gate MOSFET(DGMOSFET). Scaling down to 100nm of gate length for MOSFET can bring about various problems such as a threshold voltage roll-off and increasing off current by tunneling since thickness of oxide is down by 1.fnm and doping concentration is increased. A current-voltage characteristics have been calculated according to changing of channel length,using analytical current-voltage relation. The analytical model has been verified by calculating I-V relation according to changing of oxide thickness and channel thickness as well as channel length. A current-voltage characteristics also have been compared and analyzed for operating temperature. When gate voltage is 2V, it is shown that a current-voltage characteristic in 77K is superior to in room temperature.

Data Retention Time and Electrical Characteristics of Cell Transistor According to STI Materials in 90 nm DRAM

  • Shin, S.H.;Lee, S.H.;Kim, Y.S.;Heo, J.H.;Bae, D.I.;Hong, S.H.;Park, S.H.;Lee, J.W.;Lee, J.G.;Oh, J.H.;Kim, M.S.;Cho, C.H.;Chung, T.Y.;Kim, Ki-Nam
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.2
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    • pp.69-75
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    • 2003
  • Cell transistor and data retention time characteristics were studied in 90 nm design rule 512M-bit DRAM, for the first time. And, the characteristics of cell transistor are investigated for different STI gap-fill materials. HDP oxide with high compressive stress increases the threshold voltage of cell transistor, whereas the P-SOG oxide with small stress decreases the threshold voltage of cell transistor. Stress between silicon and gap-fill oxide material is found to be the major cause of the shift of the cell transistor threshold voltage. If high stress material is used for STI gap fill, channel-doping concentration can be reduced, so that cell junction leakage current is decreased and data retention time is increased.

Analysis of Threshold Voltage and DIBL Characteristics for Double Gate MOSFET Based on Scaling Theory (스켈링 이론에 따른 DGMOSFET의 문턱전압 및 DIBL 특성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.145-150
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    • 2013
  • This paper has presented the analysis for threshold voltage and drain induced barrier lowering among short channel effects occurred in subthreshold region for double gate(DG) MOSFET as next-generation devices, based on scaling theory. To obtain the analytical solution of Poisson's equation, Gaussian function has been used as carrier distribution to analyze closely for experimental results, and the threshold characteristics have been analyzed for device parameters such as channel thickness and doping concentration and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold characteristics. As a result to apply scaling theory, we know the threshold voltage and drain induced barrier lowering are changed, and the deviation rate is changed for device parameters for DGMOSFET.

Breakdown Voltages Deviation for Channel Dimension of Double Gate MOSFET (이중게이트 MOSFET의 채널구조에 따른 항복전압 변화)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.3
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    • pp.672-677
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    • 2013
  • This paper have analyzed the change of breakdown voltage for channel dimension of double gate(DG) MOSFET. The breakdown voltage to have the small value among the short channel effects of DGMOSFET to be next-generation devices have to be precisely analyzed. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The breakdown voltages have been analyzed for device parameters such as channel thickness and doping concentration, and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result, we know the breakdown voltage is influenced on Gaussian function and device parameters for DGMOSFET.

Analysis of Breakdown Voltages Deviation for Channel Dimension of Double Gate MOSFET (DGMOSFET의 채널구조에 따른 항복전압변화에 대한 분석)

  • Jung, Hakkee;Han, Jihyung;Jeong, Dongsoo;Lee, Jongin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.811-814
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    • 2012
  • This paper have analyzed the change of breakdown voltage for channel dimension of double gate(DG) MOSFET. The breakdown voltage to have the small value among the short channel effects of DGMOSFET to be next-generation devices have to be precisely analyzed. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The breakdown voltages have been analyzed for device parameters such as channel thickness and doping concentration, and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. Resultly, we know the breakdown voltage is influenced on Gaussian function and device parameters for DGMOSFET.

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Development of SiGe Heterostructure Epitaxial Growth and Device Fabrication Technology using Reduced Pressure Chemical Vapor Deposition (저압화학증착을 이용한 실리콘-게르마늄 이종접합구조의 에피성장과 소자제작 기술 개발)

  • Shim, K.H;Kim, S.H;Song, Y.J;Lee, N.E;Lim, J.W;Kang, J.Y
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.4
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    • pp.285-296
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    • 2005
  • Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 % in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.

Analysis for Breakdown Voltage of Double Gate MOSFET according to Device Parameters (소자파라미터에 따른 DGMOSFET의 항복전압분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.372-377
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    • 2013
  • This paper have presented the breakdown voltage for double gate(DG) MOSFET. The analytical solution of Poisson's equation and Fulop's breakdown condition have been used to analyze for breakdown voltage. The double gate(DG) MOSFET has the advantage to reduce the short channel effects as improving the current controllability of gate. But we need the study for the breakdown voltage of DGMOSFET since the decrease of the breakdown voltage is unavoidable. To approximate with experimental values, we have used the Gaussian function as charge distribution for Poisson's equation, and the change of breakdown voltage has been observed for device geometry. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result to observe the breakdown voltage, the smaller channel length and the higher doping concentration become, the smaller the breakdown voltage becomes. Also we have observed the change of the breakdown voltage for gate oxide thickness and channel thickness.