• JSTS:Journal of Semiconductor Technology and Science
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• 제16권2호
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• pp.210-214
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• 2016

In this paper, the decrease in the contact resistance of Ni germanide/Ge contact was studied as a function of the thickness of the antimony (Sb) interlayer for high performance Ge MOSFETs. Sb layers with various thickness of 2, 5, 8 and 12 nm were deposited by RF-Magnetron sputter on n-type Ge on Si wafers, followed by in situ deposition of 15nm-thick Ni film. The contact resistance of samples with the Sb interlayer was lower than that of the reference sample without the Sb interlayer. We found that the Sb interlayer can lower the contact resistance of Ni germanide/Ge contact but the reduction of contact resistance becomes saturated as the Sb interlayer thickness increases. The proposed method is useful for high performance n-channel Ge MOSFETs.

• Carbon letters
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• 제14권3호
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• pp.171-174
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• 2013

The high quality contact between graphene and the metal electrode is a crucial factor in achieving the high performance of graphene transistors. However, there is not sufficient research about contact resistance reduction methods to improve the junction of metal-graphene. In this paper, we propose a new method to decrease the contact resistance between graphene and metal using directly grown graphene over a metal surface. The study found that the grown graphene over copper, as an intermediate layer between the copper and the transferred graphene, reduces contact resistance, and that the adhesion strength between graphene and metal becomes stronger. The results confirmed the contact resistance of the metal-graphene of the proposed structure is nearly half that of the conventional contact structure.

• 한국전기전자재료학회논문지
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• 제31권1호
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• pp.6-10
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• 2018

Ni germanide (NiGe) is a promising alloy material with small contact resistance at the source/drain (S/D) of Ge MOSFETs. However, it is necessary to reduce the specific contact resistance between NiGe and the doped Ge S/D region in high-performance MOSFETs. In this study, a novel method is proposed to reduce the specific contact resistance between NiGe and p-type Ge (p-Ge) using a Tb interlayer. The specific contact resistance between NiGe and p-Ge was successfully decreased with the introduction of the Tb interlayer. To investigate the mechanism behind the reduction in the specific contact resistance, the elemental distribution and crystalline structure of NiGe were analyzed using secondary ion mass spectroscopy and X-ray diffraction. It is likely that the reduction in specific contact resistance was caused by an increase in the concentration of boron in the space between NiGe and p-Ge due to the influence of the Tb interlayer.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회B
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• pp.2357-2362
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• 2008

LHP is different from a conventional heat pipes in design and heat and fluid flow passages. The situations of the former is much complex than the latter. In LHPs, evaporation occurs at the contact interface between the heating plate and the porous wick, so some micro channels machined at the contact interface serve to let the vapor flow out of the evaporator. This complexity of contact geometry was known to cause a high resistance to heat flow. The present work was to study the problem of heat passage across the contact surface for LHPs and determine those values contact resistance. For two cases of contact structures, the thermal contact resistances were examined experimentally, one being obtained through mechanical contact under pressure and the other through sintered bonding. Nickel powder wick and copper plate were used for specimens. The result showed that a substantial reduction of contact resistance of an order of degree could be obtainable by sintered bonding.

• Tribology and Lubricants
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• 제35권1호
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• pp.16-23
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• 2019

In this study, we aim to analyze the effects of both contact layer properties and surface roughness on contact resistance. The contact has a great influence on performance in terms of electrical conduction and heat transfer. The two biggest factors determining contact resistance are the presence of surface roughness and the surface layer. For this reason we calculated the contact resistance by considering both factors simultaneously. The model of this study to calculate contact resistance is as follows. First, the three representative surface parameters for the GW model are obtained by Nayak's random process. Then, the apparent contact area, real contact area, and contact number of asperities are calculated using the GW model with the surface parameters. The contact resistance of a single surface layer is calculated using Mikic's constriction equation. The total contact resistance is approximated by the parallel connection between the same asperity contact resistances. The results of this study are as follows. The appropriate thickness with reduction effect for contact resistance is determined according to the difference in conductivity between the base layer and surface layer. It was confirmed that the standard deviation of surface roughness has the greatest influence on surface roughness parameters. The results of this study will be useful for selecting the surface material and surface roughness when the design considering the contact resistance is needed.

• Transactions on Electrical and Electronic Materials
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• 제9권4호
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• pp.137-142
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• 2008

The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

• Applied Science and Convergence Technology
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• 제26권4호
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• pp.55-61
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• 2017

Graphene, with a carrier mobility achieving up to $140,000cm^2/Vs$ at room temperature, makes it an ideal material for application in semiconductor devices. However, when the metal comes in contact with the graphene sheet, an energy barrier forms at the metal-graphene interface, resulting in a drastic reduction of the carrier mobility of graphene. In this review, the various methods of forming metal-graphene covalent contacts to lower the contact resistance are discussed. Furthermore, the graphene sheet in the area of metal contact can be cut in certain patterns, also discussed in this review, which provides a more efficient approach to forming covalent contacts, ultimately reducing the contact resistance for the realization of high-performance graphene devices.

• Journal of Welding and Joining
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• 제31권4호
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• pp.42-46
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• 2013

The contact tip for flux cored arc welding has important functions to transmit the welding current to the wire and to guide the wire to molten pool. A damaged contact tip causes a productivity reduction and a welding quality problem. In this study, the welding experiments for the wear resistance of contact tip regarding flux cored wire types were performed. With two fold type and a seamless type flux cored wires, the wear rates of contact tips were compared. In addition, the wear rate was checked according to the contact tip position.

• Transactions on Electrical and Electronic Materials
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• 제18권5호
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• pp.253-256
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• 2017

A thin Te interlayer was applied to a Ni/n-InGaAs contact to reduce the contact resistance between Ni-InGaAs and n-InGaAs. A 5-nm-thick Te layer was first deposited on a Si-doped n-type $In_{0.53}Ga_{0.47}As$ layer, followed by in situ deposition of a 30-nm-thick Ni film. After the formation of the Ni-InGaAs alloy by rapid thermal annealing at $300^{\circ}C$ for 30 s, the extracted specific contact resistivity (${\rho}_c$) reduced by more than one order of magnitude from $2.86{\times}10^{-4}{\Omega}{\cdot}cm^2$ to $8.98{\times}10^{-6}{\Omega}{\cdot}cm^2$ than that of the reference sample. A thinner Ni-InGaAs alloy layer with a better morphology was obtained by the introduction of the Te layer. The improved interface morphology and the graded Ni-InGaAs layer formed at the interface were believed to be responsible for ${\rho}_c$ reduction.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.283-287
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• 2017

Recently, Ni-InGaAs has been required for high-performance III-V MOSFETs as a promising self-aligned material for doped source/drain region. As downscaling of device proceeds, reduction of contact resistance ($R_c$) between Ni-InGaAs and n-InGaAs has become a challenge for higher performance of MOSFETs. In this paper, we compared three types of sample, vacuum, 2% $H_2$ and 4% $H_2$ annealing condition in rapid thermal annealing (RTA) step, to verify the reduction of $R_c$ at Ni-InGaAs/n-InGaAs interface. Current-voltage (I-V) characteristic of metal-semiconductor contact indicated the lowest $R_c$ in 4% $H_2$ sample, that is, higher current for 4% $H_2$ sample than other samples. The result of this work could be useful for performance improvement of InGaAs n-MOSFETs.