• Title/Summary/Keyword: capacitance-voltage (C-V)

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Capacitance-Voltage (C-V) Characteristics of Cu/n-type InP Schottky Diodes

  • Kim, Hogyoung
    • Transactions on Electrical and Electronic Materials
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    • v.17 no.5
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    • pp.293-296
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    • 2016
  • Using capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements, the electrical properties of Cu/n-InP Schottky diodes were investigated. The values of C and G/ω were found to decrease with increasing frequency. The presence of interface states might cause excess capacitance, leading to frequency dispersion. The negative capacitance was observed under a forward bias voltage, which may be due to contact injection, interface states or minority-carrier injection. The barrier heights from C-V measurements were found to depend on the frequency. In particular, the barrier height at 200 kHz was found to be 0.65 eV, which was similar to the flat band barrier height of 0.66 eV.

Accurate RF C-V Method to Extract Effective Channel Length and Parasitic Capacitance of Deep-Submicron LDD MOSFETs

  • Lee, Sangjun;Lee, Seonghearn
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.653-657
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    • 2015
  • A new paired gate-source voltage RF capacitance-voltage (C-V) method of extracting the effective channel length and parasitic capacitance using the intersection between two closely spaced linear regression lines of the gate capacitance versus gate length measured from S-parameters is proposed to remove errors from conventional C-V methods. Physically verified results are obtained at the gate-source voltage range where the slope of the gate capacitance versus gate-source voltage is maximized in the inversion region. The accuracy of this method is demonstrated by finding extracted value corresponding to the metallurgical channel length.

Extraction and Modeling of High-Temperature Dependent Capacitance-Voltage Curve for RF MOSFETs (고온 종속 RF MOSFET 캐패시턴스-전압 곡선 추출 및 모델링)

  • Ko, Bong-Hyuk;Lee, Seong-Hearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.10
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    • pp.1-6
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    • 2010
  • In this paper, RF Capacitance-Voltage(C-V) curve of short-channel MOSFET has been extracted from the room temperature to $225^{\circ}C$ using a RF method based on measured S-parameter data, and its high-temperature dependent characteristics are empirically modeled. It is observed that the voltage shift according to the variation of temperature in the weak inversion region of RF C-V curves is lower than the threshold voltage shift, but it is confirmed that this phenomenon is unexplainable with a long-channel theoretical C-V equation. The new empirical equation is developed for high-temperature dependent modeling of short-channel MOSFET C-V curves. The accuracy of this equation is demonstrated by observing good agreements between the modeled and measured C-V data in the wide range of temperature. It is also confirmed that the channel capacitance decreases with increasing temperature at high gate voltage.

Threshold Voltage Variation of ZnS:Mn/ZnS:Tb Thin- film Electroluminescent(TFEL) Devices (ZnS:Mn/ZnS:Tb 박막 전계발광소자의 문턱전압 변화)

  • 이순석;윤선진;임성규
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.6
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    • pp.21-27
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    • 1998
  • Electrical and optical characteristics of ZnS:Mn/ZnS:Tb multilayer TFEL devices were investigated for multi-color electroluminescent display applications. Emission spectra of M $n^{2+}$ and T $b^{3+}$ ions were observed from ZnS:Mn/ZnS:Tb multi-layer TFEL devices, and were very broad from 540 nm to 640 nm. Saturation luminance measured at 155 V was 1025 Cd/$m^2$. C-V, $Q_{t}$ - $V_{p}$ curves showed that the phosphor capacitance ( $C_{p}$ ) and the insulator capacitance ( $C_{i}$ ) were 13.5nF/$\textrm{cm}^2$ and 60 nF/$\textrm{cm}^2$, respectively. Threshold voltage( $V_{thl}$) was shown to decrease from 126 V to 93 V due to the increase of the applied voltage from 155 V to 185 V, which was attributed to the increase of the polarization charge. The equation for the calculation of the threshold voltage as a function of the applied voltage was proposed for the first time. The calculated threshold voltage agreed well with the data obtained from the measurement.t.t.t.

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Accurate Extraction of the Effective Channel Length of MOSFET Using Capacitance Voltage Method (Capacitance - Voltage 방법을 이용한 MOSFET의 유효 채널 길이 추출)

  • 김용구;지희환;한인식;박성형;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.7
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    • pp.1-6
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    • 2004
  • For MOSFET devices with nanometer range gate length, accurate extraction of effective gate length is highly important because transistor characteristics become very sensitive to effective channel length. In this paper, we propose a new approach to extract the effective channel length of nanometer range MOSFET by Capacitance Voltage(C-V) method. The effective channel length is extracted using gate to source/drain capacitance( $C_{gsd}$). It is shown that 1/$\beta$ method, Terada method and other C-V method are inadequate to extract the accurate effective channel length. Therefore, the proposed method is highly effective for extraction of effective channel length of 100nm CMOSFETs.s.

Comparison of Electrical Properties between Sputter Deposited Au and Cu Schottky Contacts to n-type Ge

  • Kim, Hogyoung;Kim, Min Kyung;Kim, Yeon Jin
    • Korean Journal of Materials Research
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    • v.26 no.10
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    • pp.556-560
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    • 2016
  • Using current-voltage (I-V) and capacitance-voltage (C-V) measurements, the electrical properties of Au and Cu Schottky contacts to n-Ge were comparatively investigated. Lower values of barrier height, ideality factor and series resistance were obtained for the Au contact as compared to the Cu contact. The values of capacitance showed strong dependence on the bias voltage and the frequency. The presence of an inversion layer at the interface might reduce the intercept voltage at the voltage axis, lowering the barrier height for C-V measurements, especially at lower frequencies. In addition, a higher interface state density was observed for the Au contact. The generation of sputter deposition-induced defects might occur more severely for the Au contact; these defects affected both the I-V and C-V characteristics.

Characteristics of C-V for Double gate MOSFET (Double gate MOSFET의 C-V 특성)

  • 나영일;김근호;고석웅;정학기;이재형
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.777-779
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    • 2003
  • In this paper, we have investigated Characteristics of C-V for Double gate MOSFET with main gate and side gate. DG MOSFET has the main gate length of 50nm and the side gate length of 70nm. We have investigated characteristics of C-V and main gate voltage is changed from -5V to +5V. Also we have investigated characteristics of C-V for DG MOSFET when the side gate length is changed from 40nm to 90nm. As the side gate length is reduced, the transconductance is increased and the capacitance is reduced. When the side gate voltage is 3V, we know that C-V curves are bending at near the main gate voltage of 1.8V. We have simulated using ISE-TCAD tool for characteristics analysis of device.

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Capacitive-Voltage properties of (Sr.Ca)$TiO_3$ Ceramics ((Sr.Ca)$TiO_3$ 세라믹스의 용량-전압 특성)

  • 강재훈;최운식;김충혁;김진사;박용필;송민종
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.34-37
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    • 2001
  • In this study, the capacitance-voltage properties of (Sr$_{1-x}$ .Ca$_{x}$)TiO$_3$(0.05$\leq$x$\leq$0.20)-based grain boundary layer ceramics were investigated. The ceramics were fabricated by the conventional mixed oxide method. The sintering temperature and time were 1480~150$0^{\circ}C$ and 4 hours, respectively. The 2nd phase formed by the thermal diffusion of CuO from the surface leads to very excellent dielectric properties, that is, $\varepsilon$$_{r}$>50000, tan$\delta$<0.05, $\Delta$C<$\pm$10%. The capacitance is almost unchanged below about 20[V] but it decreases slowly about 20[V]. The results of the capacitance-voltage properties indicated that the grain boundary was composed of the continuous insulating layers.ulating layers.s.

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Capacitance-voltage characteristics of ZnO/GaN heterostructures (ZnO/GaN 이종접합구조의 capacitance-voltage 특성에 관한 연구)

  • Oh, Dong-Cheol;Han, Chang-Suk;Koo, Kyung-Wan;Jung, Soon-Won
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.148-149
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    • 2006
  • Capacitance-voltage(C-V) 측정평가를 통하여 ZnO/GaN 이종접합구조의 전기적인 특성을 조사한다. 실온에서 10kHz의 주파수에서 얻은 ZnO/GaN의 이종접합구조에 대한 C-V 측정결과는 이종접합계면에서 고밀도의 전자가 축적되어 있음을 나타낸다. 이것은 ZnO/GaN 이종접합계면의 다른 재료에서 볼 수 없는 큰 전도대불연속에 기인한 것인데, 각각의 층의 전도도을 제어함으로 이종접합계면에 축적되는 전자밀도를 ${\sim}10^{19}cm^{-3}$까지 증가시킬 수 있다. 따라서 ZnO/GaN 이종접합구조는 이종접합(合)트래지스터로서 유망한 재료로 판단된다.

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Electrical Properties of CuPc FET with Different Substrate Temperature

  • Lee, Ho-Shik;Park, Yong-Pil;Cheon, Min-Woo
    • Transactions on Electrical and Electronic Materials
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    • v.8 no.4
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    • pp.170-173
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    • 2007
  • Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated the organic field-effect transistor based a copper phthalocyanine (CuPc) as an active layer on the silicon substrate. The CuPc FET device was made a topcontact type and the substrate temperature was room temperature and $150^{\circ}C$. The CuPc thickness was 40 nm, and the channel length was $50{\mu}m$, channel width was 3 mm. We observed the typical current-voltage (I-V) characteristics and capacitance-voltage (C-V) in CuPc FET and we calculated the effective mobility with each device. Also, we observed the AFM images with different substrate temperature.