• ETRI Journal
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• v.33 no.6
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• pp.969-972
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• 2011

This letter presents a CMOS RF front-end operating in a subthreshold region for low-power Band-III mobile TV applications. The performance and feasibility of the RF front-end are verified by integrating with a low-IF RF tuner fabricated in a 0.13-${\mu}m$ CMOS technology. The RF front-end achieves the measured noise figure of 4.4 dB and a wide gain control range of 68.7 dB with a maximum gain of 54.7 dB. The power consumption of the RF front-end is 13.8 mW from a 1.2 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.7
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• pp.1463-1469
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• 2012

This paper has presented the influence of scaling theory on short channel effects of double gate(DG) MOSFET in subthreshold region. In the case of conventional MOSFET, to preserve constantly output characteristics,current and switching frequency have been analyzed based on scaling theory. To analyze the results of application of scaling theory for short channel effects of DGMOSFET, the changes of threshold voltage, drain induced barrier height and subthreshold swing have been observed according to scaling factor. The analytical potential distribution of Poisson equation already verified has been used. As a result, it has been observed that threshold voltage among short channel effects is grealty changed according to scaling factor. The best scaling theory for DGMOSFET has been explained as using modified scaling theory, applying weighting factor reflected the influence of two gates when scaling theory has been applied for channel length.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.10
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• pp.1840-1844
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• 2008

In this paper, the influence of channel doping concentration, which the most important factor is as double gate MOSFET is fabricated, on transport characteristics has been analyzed in the subthreshold region. The analytical model is used to derive transport model based on Poisson equation. The thermionic omission and tunneling current to have an influence on subthreshold current conduction are analyzed, and the relationship of doping concentration and subthreshold swings of this paper are compared with those of Medici two dimensional simulation, to verify this model. As a result, transport model presented in this paper is good agreement with two dimensional simulation model, and the transport characteristics have been considered according to the dimensional parameters of double gate MOSFET.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.101-102
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• 2009

SGOI MOSFETs with various Ge mole fractions were fabricated and compared to the SOI MOSFET. SGOI MOSFETs have a lager drain current and higher effective mobility than the SOI MOSFET as increased Ge mole fractions. The lattice constant difference causes lattice mismatch between the SiGe layer and the top-Si layer during the top-Si layer growth. However, SGOI MOSFETs have a lager leakage current at subthreshold region. Also, leakage current at subthreshold region increased with Ge mole fractions. This is attributable to the crystalline defects due to the lattice mismatch between the SiGe layer and the top-Si layer.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.75-87
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• 2012

A design paradigm using sequential geometric programming is presented to accurately design CMOS op amps with BSIM3. It is based on new adaptive modeling of transistor parameters through the operating point simulation. This has low modeling cost as well as great simplicity and high accuracy. The short-channel dc, high-frequency small-signal, and short-channel noise models are used to characterize the physical behavior of submicron devices. For low-power and low-voltage design, this paradigm is extended to op amps operating in the subthreshold region. Since the biasing and modeling errors are less than 0.25%, the characteristics of the op amps well match simulation results. In addition, small dependency of design results on initial values indicates that a designed op amp may be close to the global optimum. Finally, the design paradigm is illustrated by optimizing CMOS op amps with accurate transfer function.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.845-847
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• 2012

In this paper, the transport characteristics for doping concentration in the channel has been analyzed for DGMOSFET. The Possion equation is used to analytical. The DGMOSFET is extensively been studying because of advantages to be able to reduce the short channel effects(SCEs) to occur in conventional MOSFET. Since SCEs have been occurred in subthreshold region including threshold region, the analysis of transport characteristics in subthreshold region is very important. The threshold voltage roll-off and DIBL have been with various of doping concentration for DGMOSFET in this study.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.29-34
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• 2017

A CMOS-based temperature sensor is proposed for low-voltage and low-power on-chip thermal monitoring applications. The proposed temperature sensor converts a proportional to absolute temperature (PTAT) current to a PTAT frequency using an integrator and hysteresis comparator. In addition, it operates in the subthreshold region, allowing reduced power consumption. The proposed temperature sensor was fabricated in a standard 90 nm CMOS technology. Measurement results of the proposed temperature sensor show a temperature error of between -0.81 and $+0.94^{\circ}C$ in the temperature range of 0 to $70^{\circ}C$ after one-point calibration at $30^{\circ}C$, with a temperature coefficient of $218Hz/^{\circ}C$. Moreover, the measured energy of the proposed temperature sensor is 36 pJ per conversion, the lowest compared to prior works.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.70-82
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• 2014

A nano-power CMOS voltage reference is proposed in this paper. Through a combination of switched-capacitor technology with the body effect in MOSFETs, the output voltage is defined as the difference between two gate-source voltages using only a single PMOS transistor operated in the subthreshold region, which has low sensitivity to the temperature and supply voltage. A low output, which breaks the threshold restriction, is produced without any subdivision of the components, and flexible trimming capability can be achieved with a composite transistor, such that the chip area is saved. The chip is implemented in $0.18{\mu}m$ standard CMOS technology. Measurements show that the output voltage is approximately 123.3 mV, the temperature coefficient is $17.6ppm/^{\circ}C$, and the line sensitivity is 0.15 %/V. When the supply voltage is 1 V, the supply current is less than 90 nA at room temperature. The area occupation is approximately $0.03mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.1045-1049
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• 2010

In this paper, we proposed an ultra-low power low noise amplifier(LNA) using a TSMC 0.18 ${\mu}m$ RF CMOS process. To satisfy the low power consumption with high gain, a current-reused technique is utilized. In addition, a low bias voltage in the subthreshold region is utilized to achieve ultra low power characteristic. The designed LNA has the voltage gain of 13.8 dB and noise figure(NF) of 3.4 dB at 2.4 GHz. The total power consumption of the designed LNA is only 0.63 mW from 0.9 V supply voltage and chip occupies $1.1\;mm{\times}0.8\;mm$ area.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.715-717
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• 2010

In this paper, the subthreshold characteristics have been alanyzed using MicroTec4.0 for double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studing since it can reduce the short channel effects due to structural characteristics. We have presented the short channel effects such as subthreshold swing and threshold voltage for DGMOSFET, using MicroTec, semiconductor simulator. We have analyzed for channel length, thickness and width to consider the structural characteristics for DGMOSFET. The subthreshold swing and threshold voltage have been analyzed for DGMOSFET using MicroTec since MicroTec is well verified as comparing with results of the numerical three dimensional models.