• Journal of Korea Society of Industrial Information Systems
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• v.17 no.3
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• pp.27-34
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• 2012

This paper presents the impact of time dependent dielectric breakdown (TDDB, also called as gate oxide breakdown) failure on nanoscale digital CMOS Circuits. Recently, TDDB for ultra-thin gate oxides has been considered as one of the critical reliability issues which can lead to performance degradation or logic failures in nanoscale CMOS devices. Also, leakage power in the standby mode can be increased significantly. In this paper, TDDB aging effects on large CMOS digital circuits in the 45nm technology are analyzed. Simulation results show that TDDB effect on MOSFET circuits can result in more significant increase of power consumption compared to delay increase.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.243-246
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• 1999

We studied the MOSFET characteristics and the hot-carrier reliability with the sidewall spacer composition and the post gate oxidation thickness in 0.20${\mu}{\textrm}{m}$ gate length transistor. The MOSFET with NO(Nitride＋Oxide) sidewall spacer exhibits the large degradation of hot-carrier lifetime because there is no buffering oxide against nitride stress. When the post gate oxidation is skipped, the hot-carrier lifetime is improved, but GIDL (Gate Induced Drain Leakage) current is also increased.

• Journal of Korean Vacuum Science & Technology
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• v.2 no.1
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• pp.25-31
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• 1998

The reliability of fluorine doped silicon oxide (SiOF) films for intermetal dielectrics in multilevel interconnections of ultra-large scale integrated circuits (ULSIs) is investigated. SiOF films were deposited by electron cyclotron resonance plasma-enhanced chemical vapor deposition (ECRPECVD) using H-free source gases, i.e., SiF4 and O2. The effect of post plasma treatment on the moisture absorption and dielectric properties of SiOF films was carried out I terms of air exposure time, The reliability test of Cu/TiN/SiOF/Fi specimen was carried out in terms of temperature by rapid thermal annealing (RTA) in N2 ambient. After O2 plasma treatment,, no appreciable peak directly related to moisture absorption was detected. The capacitance-voltage (C-V) characteristics of the O2 plasma treated SiOF film showed that the film remained to hold the sound dielectric properties even after boiling treatment. The Cu/TiN/SiOF/Si system was found to be reliable up to $600^{\circ}C$.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.285-291
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• 2013

In this paper, MOS-Capacitor and MOSFET devices with a Low Level Leakage Current of oxide thickness, channel width and length respectively were to investigate the reliability characterizations mechanism of ultra thin gate oxide films. These stress induced leakage current means leakage current caused by stress voltage. The low level leakage current in stress and transient current of thin silicon oxide films during and after low voltage has been studied from strss bias condition respectively. The stress channel currents through an oxide measured during application of constant gate voltage and the transient channel currents through the oxide measured after application of constant gate voltage. The study have been the determination of the physical processes taking place in the oxides during the low level leakage current in stress and transient current by stress bias and the use of the knowledge of the physical processes for driving operation reliability.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.2
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• pp.74-79
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• 2018

In this report, the results of a systematic study on the effects of polycrystalline silicon gate depletion on the reliability characteristics of metal-oxide semiconductor field-effect transistor (MOSFET) devices were discussed. The devices were fabricated using standard complimentary metal-oxide semiconductor (CMOS) processes, wherein phosphorus ion implantation with implant doses varying from $10^{13}$ to $5{\times}10^{15}cm^{-2}$ was performed to dope the polycrystalline silicon gate layer. For implant doses of $10^{14}/cm^2$ or less, the threshold voltage was increased with the formation of a depletion layer in the polycrystalline silicon gate layer. The gate-depletion effect was more pronounced for shorter channel lengths, like the narrow-width effect, which indicated that the gate-depletion effect could be used to solve the short-channel effect. In addition, the hot-carrier effects were significantly reduced for implant doses of $10^{14}/cm^2$ or less, which was attributed to the decreased gate current under the gate-depletion effects.

• Electrical & Electronic Materials
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• v.7 no.1
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• pp.25-31
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• 1994

Properties of oxynitride films reoxidized by $N_2{O}$ gas after thermal oxidation and $N_2{O}$ oxide films directly oxidized by using $N_2{O}$ gas on the bare silicon wafer have been studied. From the AES analysis, nitrogen pile-up at the interface of Si/oxynitride and Si/$N_2{O}$ oxide has observed. $N_2{O}$ oxide and oxynitride films have the self-limited characteristics. Therefore, it will be possible to obtain ultra-thin films. Nitrogen pile-up at the interfaces of Si/oxynitride and Si/$N_2{O}$ oxide strengthens film structure and improves dielectric reliability. Although fixed charge densities and interface trap densities of N20 oxide and oxynitride films have somewhat higher than those of thermal $SiO_2{O}$, $N_2{O}$ oxide and oxynitride films showed improved I-V characteristics and constant current stress.

• Transactions on Electrical and Electronic Materials
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• v.13 no.4
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• pp.188-191
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• 2012

This paper introduces a new method regarding deuterium incorporation in the gate dielectric including deuterium implantation and post-annealing at the back-end-of-the process line. The control device and the deuterium furnace-annealed device were also prepared for comparison with the implanted device. It was observed that deuterium implantation at a light dose of $1{\times}10^{12}-1{\times}10^{14}/cm^2$ at 30 keV reduced hot-carrier injection (HCI) degradation and negative bias temperature instability (NBTI) within our device structure due to the reduction in oxide charge and interface trap. Deuterium implantation provides a possible solution to enhance the bulk and interface reliabilities of the gate oxide under the electrical stress.

• Proceedings of the KIEE Conference
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• 1989.11a
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• pp.114-118
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• 1989

Due to the increased integration density of VLSI circuits a highly reliable thin oxide film is required to fabricate a small geometry MOS device. The behavior of thermal $SiO_2$ under high electric field and current condition has a major effect on MOS device degration and also the practical use of MOS device under irradiation has cause the degration of thin oxide films. In this paper, in order to evaluate the reliability of thin oxides with no stress applied and stressed by the irradiation under low electric field, the tests of TDDB (Time-dependent-dielectric breakdown) are used. Failure times against electric field are examined and acceleration factor is obtained for each case. Based on the experimental data, breakdown wear out limitation for thin oxide films is characterised.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.3
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• pp.154-159
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• 2015

In this paper, we propose a numerical method to model temperature dependent threshold voltage shift observed in metal oxide thin-film transistors (TFTs). The proposed model is then implemented in AIM-SPICE circuit simulation tool. The proposed method consists of modeling the well-known stretched-exponential time dependent threshold voltage shift and their temperature dependent coefficients. The outputs from AIM-SPICE tool and the stretched-exponential model at different temperatures in the literature are compared and they show a good agreement. Since metal oxide TFTs are the promising candidate for flat panel displays, the proposed method will be a good stepping stone to help enhance reliability of fast-evolving display circuits.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.1
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• pp.6-9
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• 2020

Thin film transistors (TFTs) with large-area, high mobility, and high reliability are important factors for next-generation displays. In particular, thin transistors based on IGZO oxide semiconductors are being actively researched for this application. In this study, several methods for improving the reliability of a-IGZO TFTs by applying various materials on a passivation layer are investigated. In the literature, inorganic SiO₂, TiO₂, Al₂O₃, ZTSO, and organic CYTOP have been used for passivation. In the case of Al₂O₃, excellent stability is exhibited compared to the non-passivation TFT under the conditions of negative bias illumination stress (NBIS) for 3 wavelengths (R, G, B). When CYTOP passivation, SiO₂ passivation, and non-passivation devices were compared under the same positive bias temperature stress (PBTS), the Vth shifts were 2.8 V, 3.3 V, and 4.5 V, respectively. The Vth shifts of TiO₂ passivation and non-passivation devices under the same NBTS were -2.2 V and -3.8 V, respectively. It is expected that the presented results will form the basis for further research to improve the reliability of a-IGZO TFT.