• Title/Summary/Keyword: MEMS Package

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On-Chip Process and Characterization of the Hermetic MEMS Packaging Using a Closed AuSn Solder-Loop (사각고리형상의 AuSn 합금박막을 이용한 MEMS 밀봉 패키징 및 특성 시험)

  • Seo, Young-Ho;Kim, Seong-A;Cho, Young-Ho;Kim, Geun-Ho;Bu, Jong-Uk
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.28 no.4
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    • pp.435-442
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    • 2004
  • This paper presents a hermetic MEMS on-chip package bonded by a closed-loop AuSn solder-line. We design three different package specimens, including a substrate heated specimen without interconnection-line (SHX), a substrate heated specimen with interconnection-line (SHI) and a locally heated specimen with interconnection-line (LHI). Pressurized helium leak test has been carried out for hermetic seal evaluation in addition to the critical pressure test for bonding strength measurement. Substrate heating method (SHX, SHI) requires the bonding time of 40min. at 400min, while local heating method (LHI) requires 4 min. at the heating power of 6.76W. In the hermetic seal test. SHX, SHI and LHI show the leak rates of 5.4$\pm$6.7${\times}$$^{-10}$ mbar-l/s, 13.5$\pm$9.8${\times}$$^{-10}$ mbar-l/s and 18.5$\pm$9.9${\times}$$^{-10}$ mbar-l/s, respectively, for an identical package chamber volume of 6.89$\pm$0.2${\times}$$^{-10}$. In the critical pressure test, no fracture is found in the bonded specimens up to the applied pressure of 1$\pm$0.1MPa, resulting in the minimum bonding strength of 3.53$\pm$0.07MPa. We find that the present on-chip packaging using a closed AuSn solder-line shows strong potential for hermetic MEMS packaging with interconnection-line due to the hermetic seal performance and the shorter bonding time for mass production.

Package-type polarization switching antenna using silicon RF MEMS SPDT switches (실리콘 RF MEMS SPDT 스위치를 이용한 패키지 형태의 편파 스위칭 안테나)

  • Hyeon, Ik-Jae;Chung, Jin-Woo;Lim, Sung-Joon;Kim, Jong-Man;Baek, Chang-Wook
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1511_1512
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    • 2009
  • This paper presents a polarization switching antenna integrated with silicon RF MEMS SPDT switches in the form of a package. A low-loss quartz substrate made of SoQ (silicon-on-quartz) bonding is used as a dielectric material of the patch antenna, as well as a packaging lid substrate of RF MEMS switches. The packaging/antenna substrate is bonded with the bottom substrate including feeding lines and RF MEMS switches by BCB adhesive bonding, and RF energy is transmitted from signal lines to antenna by slot coupling. Through this approach, fabrication complexity and degradation of RF performances of the antenna due to the parasitic effects, which are all caused from the packaging methods, can be reduced. This structure is expected to be used as a platform for reconfigurable antennas with RF MEMS tunable components. A linear polarization switching antenna operating at 19 GHz is manufactured based on the proposed method, and the fabrication process is carefully described. The s-parameters of the fabricated antenna at each state are measured to evaluate the antenna performance.

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Stacked packaging using vertical interconnection based on Si-through via (Si-관통 전극에 의한 수직 접속을 이용한 적층 실장)

  • Jeong, Jin-Woo;Lee, Eun-Sung;Kim, Hyeon-Cheol;Moon, Chang-Youl;Chun, Kuk-Jin
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.595-596
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    • 2006
  • A novel Si via structure is suggested and fabricated for 3D MEMS package using the doped silicon as an interconnection material. Oxide isolations which define Si via are formed simultaneously when fabricating the MEMS structure by using DRIE and oxidation. Silicon Direct Bonding Multi-stacking process is used for stacked package, which consists of a substrate, MEMS structure layer and a cover layer. The bonded wafers are thinned by lapping and polishing. A via with the size of $20{\mu}m$ is fabricated and the electrical and mechanical characteristics of via are under testing.

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Wafer Level Package Using Glass Cap and Wafer with Groove-Shaped Via (유리 기판과 패인 홈 모양의 홀을 갖는 웨이퍼를 이용한 웨이퍼 레벨 패키지)

  • Lee, Joo-Ho;Park, Hae-Seok;Shin, Jea-Sik;Kwon, Jong-Oh;Shin, Kwang-Jae;Song, In-Sang;Lee, Sang-Hun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2217-2220
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    • 2007
  • In this paper, we propose a new wafer level package (WLP) for the RF MEMS applications. The Film Bulk Acoustic Resonator (FBAR) are fabricated and hermetically packaged in a new wafer level packaging process. With the use of Au-Sn eutectic bonding method, we bonded glass cap and FBAR device wafer which has groove-shaped via formed in the backside. The device wafer includes a electrical bonding pad and groove-shaped via for connecting to the external bonding pad on the device wafer backside and a peripheral pad placed around the perimeter of the device for bonding the glass wafer and device wafer. The glass cap prevents the device from being exposed and ensures excellent mechanical and environmental protection. The frequency characteristics show that the change of bandwidth and frequency shift before and after bonding is less than 0.5 MHz. Two packaged devices, Tx and Rx filters, are attached to a printed circuit board, wire bonded, and encapsulated in plastic to form the duplexer. We have designed and built a low-cost, high performance, duplexer based on the FBARs and presented the results of performance and reliability test.

A design of silicon based vertical interconnect for 3D MEMS devices under the consideration of thermal stress (3D MEMS 소자에 적합한 열적 응력을 고려한 수직 접속 구조의 설계)

  • Jeong, Jin-Woo;Kim, Hyeon-Cheol;Chun, Kuk-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.112-117
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    • 2008
  • Vertical interconnection scheme using novel silicon-through-via for 3D MEMS devices or stacked package is proposed and fabricated to demonstrate its feasibility. The suggested silicon-through-via replaces electroplated copper, which is used as an interconnecting material in conventional through-via, with doped silicon. Adoption of doped silicon instead of metal eliminates thermal-mismatch-induced stress, which can make troubles in high temperature MEMS processes, such as wafer bonding and LP-CVD(low pressure chemical vapor deposition). Two silicon layers of $30{\mu}m$ thickness are stacked on the substrate. The through-via arrays with spacing $40{\mu}m$ and $50{\mu}m$ are fabricated successfully. Electrical characteristics of the through-via are measured and analyzed. The measured resistance of the silicon-through-via is $169.9\Omega$.

Investigation on Hermeticity of Liquid Crystal Polymer Package for MEMS Based Safety Device (MEMS 기반 안전 소자에 대한 액정 폴리머 패키지의 밀폐도 연구)

  • Choi, Jinnil;Kim, Yong-Kook;Ju, Byeong-Kwon
    • Journal of Sensor Science and Technology
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    • v.24 no.5
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    • pp.287-290
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    • 2015
  • Liquid crystal polymer (LCP) is a thermoplastic polymer with superior mechanical and thermal properties. In addition, its characteristics include very low water absorption rate and possibility to apply bonding process under low temperature. In this study, LCP is utilized as a packaging material for a microelectronic system (MEMS) based safety device with suggestion of a low temperature packaging process. Highly sensitive and stable capacitive type humidity sensor is fabricated to investigate hermeticity of the packaged MEMS device.

Packaging MEMS, The Great Challenge of the $21^{st}$ Century

  • Bauer, Charles-E.
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.29-33
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    • 2000
  • MEMS, Micro Electro-Mechanical Systems, present one of the greatest advanced packaging challenges of the next decade. Historically hybrid technology, generally thick film, provided sensors and actuators while integrated circuit technologies provided the microelectronics for interpretation and control of the sensor input and actuator output. Brought together in MEMS these technical fields create new opportunities for miniaturization and performance. Integrated circuit processing technologies combined with hybrid design systems yield innovative sensors and actuators for a variety of applications from single crystal silicon wafers. MEMS packages, far more simple in principle than today's electronic packages, provide only physical protection to the devices they house. However, they cannot interfere with the function of the devices and often must actually facilitate the performance of the device. For example, a pressure transducer may need to be open to atmospheric pressure on one side of the detector yet protected from contamination and blockage. Similarly, an optical device requires protection from contamination without optical attenuation or distortion being introduced. Despite impediments such as package standardization and complexity, MEMS markets expect to double by 2003 to more than $9 billion, largely driven by micro-fluidic applications in the medical arena. Like the semiconductor industry before it. MEMS present many diverse demands on the advanced packaging engineering community. With focused effort, particularly on standards and packaging process efficiency. MEMS may offer the greatest opportunity for technical advancement as well as profitability in advanced packaging in the first decade of the 21st century! This paper explores MEMS packaging opportunities and reviews specific technical challenges to be met.

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Polymer Wafer bonding of MEMS device and Cap Wafer with deep cavity (Deep cavity를 가진 Cap Wafer와 MEMS 소자의 Polymer Wafer bonding)

  • Lee, Hyun-Kee;Park, Tae-Joon;Yoon, Sang-Kee;Park, Nam-Su;Park, Hyung-Jae;Min, Jong-Hwan;Lee, Yeong-Gyu
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1702-1703
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    • 2011
  • MEMS 소자의 Wafer level Package 관련하여 Deep cavity를 가진 Cap Wafer와 Polymer bonding 중 cavity 단차로 인한 Polymer Patterning 및 접합 불량의 어려움을 극복할 수 있는 새로운 공정 flow를 제안하였다. Cavity를 형성할 때 사용하는 Si deep etching Mask인 기존의 Photoresist를 접합용 감광성 Polymer로 대체하고, cavity 형성 후, 별도의 추가 공정 없이 이 Polymer를 이용해 Wafer bonding을 진행하였다. 이를 통해 cavity 단차에 따른 문제를 해결함과 동시에 공정이 단순하고 제작 비용이 저렴하며, 신뢰성 있는 Wafer level Package를 구현하였다.

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LTCC-based Packaging Method using Au/Sn Eutectic Bonding for RF MEMS Applications (RF MEMS 소자 실장을 위한 LTCC 및 금/주석 공융 접합 기술 기반의 실장 방법)

  • Bang, Yong-Seung;Kim, Jong-Man;Kim, Yong-Sung;Kim, Jung-Mu;Kwon, Ki-Hwan;Moon, Chang-Youl;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
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    • 2005.11a
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    • pp.30-32
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    • 2005
  • This paper reports on an LTCC-based packaging method using Au/Sn eutectic bonding process for RF MEMS applications. The proposed packaging structure was realized by a micromachining technology. An LTCC substrate consists of metal filled vertical via feedthroughs for electrical interconnection and Au/Sn sealing rim for eutectic bonding. The LTCC capping substrate and the glass bottom substrate were aligned and bonded together by a flip-chip bonding technology. From now on, shear strength and He leak rate will be measured then the fabricated package will be compared with the LTCC package using BCB adhesive bonding method which has been researched in our previous work.

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Edge Impulse Machine Learning for Embedded System Design (Edge Impulse 기계 학습 기반의 임베디드 시스템 설계)

  • Hong, Seon Hack
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.17 no.3
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    • pp.9-15
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    • 2021
  • In this paper, the Embedded MEMS system to the power apparatus used Edge Impulse machine learning tools and therefore an improved predictive system design is implemented. The proposed MEMS embedded system is developed based on nRF52840 system and the sensor with 3-Axis Digital Magnetometer, I2C interface and magnetic measurable range ±120 uT, BM1422AGMV which incorporates magneto impedance elements to detect magnetic field and the ARM M4 32-bit processor controller circuit in a small package. The MEMS embedded platform is consisted with Edge Impulse Machine Learning and system driver implementation between hardware and software drivers using SensorQ which is special queue including user application temporary sensor data. In this paper by experimenting, TensorFlow machine learning training output is applied to the power apparatus for analyzing the status such as "Normal, Warning, Hazard" and predicting the performance at level of 99.6% accuracy and 0.01 loss.