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http://dx.doi.org/10.3795/KSME-A.2004.28.4.435

On-Chip Process and Characterization of the Hermetic MEMS Packaging Using a Closed AuSn Solder-Loop  

Seo, Young-Ho (한국과학기술원 디지털나노구동연구단)
Kim, Seong-A (LG전자기술원 마이크로시스템 그룹)
Cho, Young-Ho (한국과학기술원 디지털나노구동연구단)
Kim, Geun-Ho (LG전자기술원 마이크로시스템 그룹)
Bu, Jong-Uk (LG전자기술원 마이크로시스템 그룹)
Publication Information
Transactions of the Korean Society of Mechanical Engineers A / v.28, no.4, 2004 , pp. 435-442 More about this Journal
Abstract
This paper presents a hermetic MEMS on-chip package bonded by a closed-loop AuSn solder-line. We design three different package specimens, including a substrate heated specimen without interconnection-line (SHX), a substrate heated specimen with interconnection-line (SHI) and a locally heated specimen with interconnection-line (LHI). Pressurized helium leak test has been carried out for hermetic seal evaluation in addition to the critical pressure test for bonding strength measurement. Substrate heating method (SHX, SHI) requires the bonding time of 40min. at 400min, while local heating method (LHI) requires 4 min. at the heating power of 6.76W. In the hermetic seal test. SHX, SHI and LHI show the leak rates of 5.4$\pm$6.7${\times}$$^{-10}$ mbar-l/s, 13.5$\pm$9.8${\times}$$^{-10}$ mbar-l/s and 18.5$\pm$9.9${\times}$$^{-10}$ mbar-l/s, respectively, for an identical package chamber volume of 6.89$\pm$0.2${\times}$$^{-10}$. In the critical pressure test, no fracture is found in the bonded specimens up to the applied pressure of 1$\pm$0.1MPa, resulting in the minimum bonding strength of 3.53$\pm$0.07MPa. We find that the present on-chip packaging using a closed AuSn solder-line shows strong potential for hermetic MEMS packaging with interconnection-line due to the hermetic seal performance and the shorter bonding time for mass production.
Keywords
On-chip Packaging; MEMS; Hermetic Sealing; Pressurized Helium Leak Test; Local Heating Method;
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