• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.359-362
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• 2010

In this study, inverter logic circuits on a plastic substrate are built with two top-gate FETs in series on a single ZnO nanowire. The voltage transfer characteristics of the ZnO nanowire-based inverter logic circuit exhibit a clear inverting operation. The logic swing, gain and transition width of the inverter logic circuit is about 90 %, 1.03 and 1.2 V, respectively. The result of mechanical bending cycles of the inverter logic circuit on a plastic substrate shows that the stable performance is maintained even after many hundreds of bending cycles.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.10
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• pp.500-504
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• 2004

We propose a new method to reduce the subthreshold leakage current. By moving the operating point of OFF state MOSFETs through input-controlled voltage generators, logic circuits with much lower leakage current can be built with few extra components. SPICE simulation results for the new inverter show correct logic results without speed degradation compared to a conventional inverter.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.777-780
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• 1999

In this paper, a fuzzy logic controller is designed for speed control of a hydraulic inverter elevator. Mathematical modeling of an elevator actuated with hydraulic system is presented and the friction characteristics of a cylinder is examined, which may cause the abrupt increase of the acceleration in the zero-crossing speed region. Simulation results show that the proposed fuzzy logic speed controller yields a better control performance than conventional PID controller.

• Transactions on Electrical and Electronic Materials
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• v.8 no.1
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• pp.21-25
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• 2007

A two-dimensional TCAD MEDICI simulator was used to examine the voltage transfer characteristics, on-off switching properties and latch-up of a CMOS inverter as a function of the n-channel length and doping levels. The channel in a LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of a CMOS inverter. The digital logic levels of the output and input voltages were analyzed from the transfer curves and circuit operation. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.12
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• pp.1249-1255
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• 2006

This paper presents a constant power control logic for perfect starting a microtubine in vehicle. Under extremely low temperature, performance of the start-up system is severely dropped than that of room temperature because of increasing of load of mechanical parts including engine core and drop of the lead-acid battery capacity. Unfortunately, performance drop of lead-acid battery makes severe problems that cause a malfunction of fuel and lubrication system and power fail of digital devices. So we propose the new start-up logic by constant output power control of lead-acid battery using PWM inverter controller for preventing above problems and keeping good performance of start-up system for microturbine. Also, we prove usefulness of new start-up logic through experimental results under $-32^{\circ}C$ ambient temperature.

• 전기의세계
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• v.28 no.1
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• pp.43-52
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• 1979

Recently, interest in multivalued(MV) logic system has been increased, despites the apparent difficulties for practical application. This is because of the many advantages of the MV compared with the 2-valued logic systems, such as; (a) higher speed of arithmetical operation on account of the smaller number of digits required for a given data, (b) better utilization of data transmission channels on account of the higher information contents per line, (c) potentially higher density of information storage. This paper describes a MV switching theory and experimental MV logic elements based on current-mode logic technique. These elements tried were a 3-stable pulse generator, a ternary AND, a ternary OR, a MT circuit and a ternary inverter. Tristable flops which are indispensable for constituting a ternary shift register are synthesized using these gates. A BCD to TCD decoder, and vice versa, are proposed by using a ternary inverter and some binary gates. Thus, the feasibility of a large scale MV digital system has been demonstrate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.3
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• pp.1-6
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• 2011

Low-power logic gates, i.e. inverter, NAND, and NOR, are proposed employing only n-channel oxide thin film transistors (TFTs). The proposed circuits were designed to prevent the pull-up and pull-down switches from being turned on simultaneously by using asymmetric feed-through and bootstrapping, thereby exhibited same output voltage swing as the input signal and no static current. The inverter is composed of 5 TFTs and 2 capacitors. The NAND and the NOR gates consist of 10 TFTs and 4 capacitors respectively. The operations of the logic gates were confirmed successfully by SPICE simulation using oxide TFT model.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.2
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• pp.179-186
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• 2007

This paper presents new ignition method and ignition recognition logic for a microturbine. New ignition method is designed by constant speed control of a microturbine with pre-determined time during a ignition period. It make more accurate air-fuel ratio as well as give enough time to ignition system to have full performance under cold temperature. And ignition recognition logic is designed by observing output current change of inverter by generating output torque of a microturbine in the instant of ignition. For filtering a output torque current of inverter with high frequency, we applied a moving average method. So far, ignition recognition is usually implemented by measuring of exhausted gas temperature(EGT) of microturbine. The proposed logic can give more accurate judgement of ignition as well as keep a good working of starting system under out of order a temperature measuring system and biased initial value of EGT sensor. Finally, the two proposed logics are proved by field operating a microturbine under various conditions.

• Transactions on Electrical and Electronic Materials
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• v.7 no.3
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• pp.99-102
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• 2006

The electrical characteristics of CMOS inverter with LDMOSFET are studied for high power and digital circuit application by using two dimensional MEDICI simulator. The simulation is done in terms of voltage transfer characteristic and on-off switching properties of CMOS inverter with variation of channel length and channel doping levels. The channel which surrounds a junction-type source in LDMOSFET is considered to be an important parameter to decide a circuit operation of CMOS inverter. The digital logic levels of input voltage show to increase with increase of n-channel length and doping levels while the logic output levels show to the almost constant.

• Journal of information and communication convergence engineering
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• v.20 no.2
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• pp.137-142
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• 2022

Monolithic three-dimensional (M3D) logics such as M3D-NAND, M3D-NOR, M3D-buffer, M3D 2×1 multiplexer, and M3D D flip-flop, consisting of modularized M3D inverters (M3D-INVs), have been proposed. In the previous M3D logic, each M3D logic had to be designed separately for a standard cell library. The proposed M3D logic is designed by placing modularized M3D-INVs and connecting interconnects such as metal lines or monolithic inter-tier-vias between M3D-INVs. The electrical characteristics of the previous and proposed M3D logics were simulated using the technology computer-aided design and Simulation Program with Integrated Circuit Emphasis with the extracted parameters of the previously developed LETI-UTSOI MOSFET model for n- and p-type MOSFETs and the extracted external capacitances. The area, propagation delay, falling/rising times, and dynamic power consumption of the proposed M3D logic are lower than those of previous versions. Despite the larger space and lower performance of the proposed M3D logic in comparison to the previous versions, it can be easily designed with a single modularized M3D-INV and without having to design all layouts of the logic gates separately.