[KSCI] Korea Science Citation Index Service

http://dx.doi.org/10.4313/TEEM.2006.7.3.099

Electrical Characteristics of CMOS Circuit Due to Channel Region Parameters in LDMOSFET

Kim, Nam-Soo (Department of Semiconductor Engineering, Chungbuk University)
Cui, Zhi-Yuan (Department of Semiconductor Engineering, Chungbuk University)
Lee, Hyung-Gyoo (Department of Semiconductor Engineering, Chungbuk University)
Kim, Kyoung-Won (Hynix Semiconductor Inc., Memory R&D)

Publication Information

Transactions on Electrical and Electronic Materials / v.7, no.3, 2006 , pp. 99-102 More about this Journal

Abstract

The electrical characteristics of CMOS inverter with LDMOSFET are studied for high power and digital circuit application by using two dimensional MEDICI simulator. The simulation is done in terms of voltage transfer characteristic and on-off switching properties of CMOS inverter with variation of channel length and channel doping levels. The channel which surrounds a junction-type source in LDMOSFET is considered to be an important parameter to decide a circuit operation of CMOS inverter. The digital logic levels of input voltage show to increase with increase of n-channel length and doping levels while the logic output levels show to the almost constant.

Keywords

CMOS inverter; LDMOSFET; Channel; Transfer characteristics;

Citations & Related Records

Reference

1	G. Ma, W. Burger, and C. Dragon, 'High efficiency LDMOS power FET for low voltage wireless communications', in IEDM Tech. Dig, p. 91, 1996
2	N. Fujishima, A. Sugi, S. Kajiwara, K. Matsubara, Y. Nagayasu, C. Ander, and T. Salama, 'A high density, low on-resistance, trench lateral power MOSFET with a trench bottom source contact', Proc. ISPSD, p, 143, 2001
3	M. G. Johnson, 'A symmetric CMOS NOR gate for high speed application', IEEE JSSC, Vol. Sc-23, No. 5, p. 1233, 1988
4	A. P. Chandrakasan, S. Sheng, and R. W. Brodersen, 'Low-power CMOS digital design', IEEE JSSC, Vol. 27, No. 4, p. 473, 1992
5	Na K. Y., Ha J. B., Choi M. H., Kim N. S., and Kim Y. S., 'Optimizing the gate-to-drift overlap length of lateral double diffused metal-oxide-semiconductor field effect transistor devices to improve hot-carrier device lifetime', Jpn. J. Appl. Phys., Vol. 45, No. 3A p.1525, 2006 DOI
6	J. scholvin, J. G. Fiorenza, and J. A. del Alamo, 'The impact of substrate surface potential on the performance of RF power LDMOSFETs on highresistivity SOI', IEDM, Tech. Dig., p. 363, 2003
7	P. H. Wilson, 'A novel trench gate LDMOS for RF applications', Microwave and Telecommunication Technology, 2003.CriMiCo 2003. 13th international Crimean conference, p. 214, 2003