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Low Power Digital Logic Gate Circuits Based on N-Channel Oxide TFTs  

Ren, Tao (Department of Electronic Engineering, Konkuk University)
Park, Kee-Chan (Department of Electronic Engineering, Konkuk University)
Oh, Hwan-Sool (Department of Electronic Engineering, Konkuk University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.48, no.3, 2011 , pp. 1-6 More about this Journal
Abstract
Low-power logic gates, i.e. inverter, NAND, and NOR, are proposed employing only n-channel oxide thin film transistors (TFTs). The proposed circuits were designed to prevent the pull-up and pull-down switches from being turned on simultaneously by using asymmetric feed-through and bootstrapping, thereby exhibited same output voltage swing as the input signal and no static current. The inverter is composed of 5 TFTs and 2 capacitors. The NAND and the NOR gates consist of 10 TFTs and 4 capacitors respectively. The operations of the logic gates were confirmed successfully by SPICE simulation using oxide TFT model.
Keywords
n-channel oxide TFT; logic gate; low power; asymmetric feed-through; bootstrapping;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
연도 인용수 순위
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