• Journal of the Korean Crystal Growth and Crystal Technology
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• v.24 no.1
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• pp.41-45
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• 2014

We have investigated the passivation property of $SiN_x$ and $SiO_2$ thin films formed using various process conditions for the application of crystalline Si solar cells. An increase in the thickness of $SiN_x$ deposited using plasma enhanced chemical vapor deposition (PECVD) led to the improvement of passivation quality. This could be associated with the passivation of Si dangling bonds by hydrogen atoms which were supplied during PECVD deposition. The $SiO_2$ thin films grown using dry oxidation process exhibited better passivation behavior than those using wet oxidation process, implying the dry oxidation process was more effective in the formation of high quality $SiO_2$ thin films. The relative effective life time gradually decreased with increasing dry oxidation temperature. Such a degradation of passivation behavior could be attributed to the increase in interface trap density caused by thermal damages.

• Journal of IKEEE
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• v.28 no.1
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• pp.46-52
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• 2024

In this study, we investigated the electrical characteristics of SiC MOSFETs by depositing Si and oxidizing it to form the gate oxide layer. A thin Si layer was deposited approximately 20 nm thick on top of the SiC epi layer, followed by oxidation to form a gate oxide layer of around 55 nm. We compared devices with gate oxide layers produced by oxidizing SiC in terms of interface trap density, on-resistance, and field-effect mobility. The fabricated devices achieved improved interface trap density (~8.18 × 10¹¹ eV^-1cm^-2), field-effect mobility (27.7 cm²/V·s), and on-resistance (12.9 mΩ·cm²).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.4
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• pp.203-207
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• 2018

In this work, we investigate the effects of lithium doping on the electric performance of solution-processed n-type zinc tin oxide (ZTO)/p-type silicon carbide (SiC) heterojunction diode structures. The proper amount of lithium doping not only affects the carrier concentration and interface quality but also influences the temperature sensitivity of the series resistance and activation energy. We confirmed that the device characteristics vary with lithium doping at concentrations of 0, 10, and 20 wt%. In particular, the highest rectification ratio of $1.89{\times}107$ and the lowest trap density of $4.829{\times}1,022cm^{-2}$ were observed at 20 wt% of lithium doping. Devices at this doping level showed the best characteristics. As the temperature was increased, the series resistance value decreased. Additionally, the activation energy was observed to change with respect to the component acting on the trap. We have demonstrated that lithium doping is an effective way to obtain a higher performance ZTO-based diode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.5
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• pp.365-370
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• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• Current Photovoltaic Research
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• v.9 no.4
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• pp.145-159
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• 2021

Light soaking (LS) stability in polymer solar cells (PSCs) has always been a challenge to achieve due to unstable photoactive layer-electrode interface. Especially, the electron transport layer (ETL) and photoactive layer interface limits the LS stability of PSCs. Herein, we have modified the most commonly used and robust zinc oxide (ZnO) ETL-interface using an organic dye molecule and a co-adsorbent. Power conversion efficiencies have been slightly improved but when these PSCs were subjected to long term LS stability chamber, equipped with heat and humidity (45℃ and 85% relative humidity), an outstanding stability in the case of ZnO/dye+co-adsorbent ETL containing devices have been achieved. The enhanced LS stability occurred due to the suppressed interfacial defects and robust contact between the ZnO and photoactive layer. Current density as well as fill factors have been retained after LS with the modified ETL as compared to un-modified ETL, owing to their higher charge collection efficiencies which originated from higher electron mobilities. Moreover, the existence of less traps (as observed from light intensity-open circuit voltage measurements and dark currents at -2V) are also found to be one of the reasons for enhanced LS stability in the current study. We conclude that the mitigation ETL-surface traps using an organic dye with a co-adsorbent is an effective and robust approach to enhance the LS stability in PSCs.

• Journal of the Korean Vacuum Society
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• v.20 no.2
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• pp.93-99
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• 2011

We investigated how the surface roughness of electrode affects the charge injection at the pentacene/Au interface. After depositing Au film on the Si substrate by sputtering, we annealed the sample to control the Au surface roughness. Pentacene and Au top electrode were subsequently deposited to complete the sample. The nucleation density of pentacene was slightly higher on the rougher Au electrode, but surface morphologies of thick pentacene films were similar on both the as-prepared and the roughened Au electrodes. The current-voltage curves obtained from the Au/pentacene/Au structure measured as a function of temperature indicated that the interface barrier was higher for the rougher Au bottom-electrode. We propose that the higher barrier was caused by the lower work function of rougher electrode surface and the higher trap density at the interface.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.737-739
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• 1998

Gate insulators using various fluoride films were investigated for thin film transistor applications. Conventional oxide containing materials exhibited high interface states, high $D_{it}$ gives an increased threshold voltage and poor stability of TFT. To improve TFT performances, we must reduce interface trap charge density between Si and gate insulator. In this paper, we investigated gate insulators such as such as $CaF_2$, $SrF_2$, $MgF_2$ and $BaF_2$. These materials exhibited an improvement in lattice mismatch, difference in thermal expansion coefficient, and electrical stability MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 0.737%, breakdown electric field higher than 1.7MV/cm and leakage current density of $10^{-6}A/cm^2$. This paper probes a possibility of new gate insulator material for TFT application.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.4
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• pp.350-354
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• 2009

$Al_{2}O_{3}$ thin films were deposited on GaN(0001) by using a Remote Plasma Atomic Layer Deposition(RPALD) technique with a trimethylaluminum(TMA) precursor and oxygen radicals in the temperature range of $25{\sim}500^{\circ}C$. The growth rate per cycle was varied with the substrate temperature from $1.8{\AA}$/cycle at $25^{\circ}C$ to $0.8{\AA}$/cycle at $500^{\circ}C$. The chemical structure of the $Al_{2}O_{3}$ thin films was studied using X-ray photoelectron spectroscopy(XPS). The electrical properties of $Al_{2}O_{3}$/GaN Metal-Insulator-Semiconductor (MIS) capacitor grown at a $300^{\circ}C$ process temperature were excellent, a low electrical leakage current density(${\sim}10^{-10}A/cm^2$ at 1 MV) at room temperature and a high dielectric constant of about 7.2 with a thinner oxide thickness of 12 nm. The interface trap density($D_{it}$) was estimated using a high-frequency C-V method measured at $300^{\circ}C$. These results show that the RPALD technique is an excellent choice for depositing high-quality $Al_{2}O_{3}$ as a Sate dielectric in GaN-based devices.

• Applied Chemistry for Engineering
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• v.9 no.7
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• pp.990-997
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• 1998

In this work, the $SiO_2$ films on the silicon substrate with different orientations were first prepared by the low temperature process using the ECR plasma diffusion as a function of microwave power and oxidation time. Before and after thermal treatment, the surface morphology, Si/O ratio from physicochemical properties, and the electrical properties of the oxide films were also investigated. The oxidation rate increased with microwave power, while surface morphology showed the nonuniform due to etching. The film quality, therefore, was lowered with increasing the defect by etching and the content of positive oxide ions in the oxide films from bulk by higher self-DC bias. The content of positive oxide ions in the oxide films with different Si orientations showed Si(100) < Si(111) < poly Si. The defects in $Si/SiO_2$ interface of $SiO_2$ film could be decreased by annealing, while $Q_{it}$ and $Q_f$ were independent of thermal treatment and the dependent on concentration of reactive oxide ions and self-DC bias of substrate. At microwave power of 300, and 400 W, the high quality $SiO_2$ film that had lower surface roughness and defect in $Si/SiO_2$ interface was obtained. The value of interface trap density, then, was ${\sim}9{\times}10^{10}cm^{-2}eV^{-1}$.

• Korean Journal of Materials Research
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• v.12 no.9
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• pp.724-728
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• 2002

Inductively-coupled $N_2$O plasma was utilized to grow silicon dioxide at low temperature and applied to fabricate polycrystalline-silicon thin film transistors. At $400^{\circ}C$, the thickness of oxide was limited to 5nm and the oxide contained Si≡N and ≡Si-N-Si≡ bonds. The nitrogen incorporation improved breakdown field to 10MV/cm and reduced the interface charge density to $1.52$\times$10^{11}$ $cm^2$ with negative charge. The $N_2$O plasma gate oxide enhanced the field effect mobility of polycrystalline thin film transistor, compared to $O_2$ plasma gate oxide, due to the reduced interface charge at the $Si/SiO_2$ interface and also due to the reduced trap density at Si grain boundaries by nitrogen passivation.