• Title/Summary/Keyword: Composite Silicide

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Microstructure Characterization on Nano-thick Nickel Cobalt Composite Silicide on Polycrystalline Substrates (다결정 실리콘 기판 위에 형성된 나노급 니켈 코발트 복합실리사이드의 미세구조 분석)

  • Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.2
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    • pp.195-200
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    • 2007
  • We fabricated thermally-evaporated 10 nm-Ni/70 w-Poly-Si/200 $nm-SiO_2/Si$ and $10nm-Ni_{0.5}Co_{0.5}/70$ nm-Poly-Si/200 $nm-SiO_2/Si$ structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required fur annealing. Silicides underwent rapid anneal at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20nm thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to $900^{\circ}C$, while the conventional nickle silicide showed low resistance below $900^{\circ}C$. Through TEM analysis, we confirmed that the 70nm-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. We identified $Ni_3Si_2,\;CoSi_2$ phase at $700^{\circ}C$ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

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Void Defects in Composite Titanium Disilicide Process (복합 티타늄실리사이드 공정에서 발생한 공극 생성 연구)

  • Cheong, Seong-Hwee;Song, Oh-Sung
    • Korean Journal of Materials Research
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    • v.12 no.11
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    • pp.883-888
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    • 2002
  • We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $\mu\textrm{m}$ patterns increase abnormally above $850^{\circ}C$ due to agglomeration. Our results imply that $sub-750^{\circ}C$ annealing is appropriate for sub 0.5 $\mu\textrm{m}$ composite X$sub-750_2$ process.

Stability of Co/Ni Silicide in Metal Contact Dry Etch (Co/Ni 복합실리사이드의 메탈 콘택 건식식각 안정성 연구)

  • Song Ohsung;Beom Sungjin;Kim Dugjoong
    • Korean Journal of Materials Research
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    • v.14 no.8
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    • pp.573-578
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    • 2004
  • Newly developed silicide materials for ULSI should have the appropriate electrical property of low resistant as well as process compatibility in conventional CMOS process. We prepared $NiCoSi_x$ silicides from 15 nm-Co/15 nm-Ni/Si structure and performed contact dry etch process to confirm the dry etch stability and compatibility of $NiCoSi_x$ layers. We dry etched the photoresist/SiO/silicide/silicon patterns with $CF_4\;and\;CHF_3$ gases with varying powers from 100 to 200 W, and pressures from 45 to 65 mTorr, respectively. Polysilicon and silicon active layers without silicide were etched $0\sim316{\AA}$ during over etch time of 3min, while silicon layers with proposed $NiCoSi_x$ silicide were not etched and showed stable surfaces. Our result implies that new $NiCoSi_x$ silicides may replace the conventional silicides due to contact etch process compatibility.

Behavior of Implanted Dopants and Formation of Molybdenum Siliclde by Composite Sputtering (Composite target으로 증착된 Mo-silicide의 형성 및 불순물의 거동)

  • Cho, Hyun-Choon;Paek, Su-Hyon;Choi, Jin-Seog;Hwang, Yu-Sang;Kim, Ho-Suk;Kim, Dong-Won;Shim, Tae-Earn;Jung, Jae-Kyoung;Lee, Jong-Gil
    • Korean Journal of Materials Research
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    • v.2 no.5
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    • pp.375-382
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    • 1992
  • Molybdenum silicide films have been prepared by sputtering from a single composite MoS$i_2$ source on both P, B$F_2$respectively implanted (5${\times}10^{15}ions/cm^2$ single crystal and P implanted (5${\times}10^{15}ions/cm^2$) polycrystalline silicon substrates followed by rapid thermal annealing in the ambient of argon. The heat treatment temperatures have been varied in the range of 600-l20$0^{\circ}C$ for 20 seconds. The properties of Mo-silicide and the diffusion behaviors of dopant after the heat treatment are investigated using X-ray diffraction, scanning electron microscopy(SEM) , secondary ions mass spectrometry(SIMS), four-point probe and $\alpha-step.$ Annealing at 80$0^{\circ}C$ or higher resulted in conversion of the amorphous phase into predominantly MoS$i_2$and a lower sheet resistance. There was no significant out-diffusion of dopants from both single crystal and polycrystalline silicon substrate into molybdenum silicide layers during annealing.

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Residual Metal Evolution with Pattern Density in Cobalt Nickel Composite Silicide Process (코발트 니켈 복합 실리사이드 공정에서 하부 형상에 따른 잔류 금속의 형상 변화)

  • Song, Oh-Sung;Kim, Sang-Yeop
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.6 no.3
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    • pp.273-277
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    • 2005
  • We prepared $0.25\~l.5um$ poly silicon gate array test group with $SiO_2$ spacers in order to employ NiCo composite salicide process from 15nm Ni/15nm Co/poly structure. We investigate the residual metal shape evolution by varying the rapid thermal silicide anneal temperature from $700^{\circ}C\;to\;1100^{\circ}C$. We observed the residual metals agglomerated into maze type and line type on $SiO_2$ field and silicide gate, respectively as temperature increased. We propose that lower silicide temperature would be favorable in newly proposed NiCo salicide in order to lessen the agglomeration causing the leakage and scum formation.

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Property of Composite Titanium Silicides on Amorphous and Crystalline Silicon Substrates (아몰퍼스실리콘의 결정화에 따른 복합티타늄실리사이드의 물성변화)

  • Song Oh-Sung;Kim Sang-Yeob
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.1-5
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    • 2006
  • We prepared 80 nm-thick TiSix on each 70 nm-thick amorphous silicon and polysilicon substrate using an RF sputtering with $TiSi_2$ target. TiSix composite silicide layers were stabilized by rapid thermal annealing(RTA) of $800^{\circ}C$ for 20 seconds. Line width of $0.5{\mu}m$ patterns were embodied by photolithography and dry etching process, then each additional annealing process at $750^{\circ}C\;and\;850^{\circ}C$ for 3 hours was executed. We investigated the change of sheet resistance with a four-point probe, and cross sectional microstructure with a field emission scanning electron microscope(FE-SEM) and transmission electron microscope(TEM), respectively. We observe an abrupt change of resistivity and voids at the silicide surface due to interdiffusion of silicide and composite titanium silicide in the amorphous substrates with additional $850^{\circ}C$ annealing. Our result implies that the electrical resistance of composite titanium silicide may be tunned by employing appropriate substrates and annealing condition.

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Characterization of tantalum silicide films formed by composite sputtering and rapid thermal annealing

  • Cho, Hyun-Choon;Paek, Su-Hyon;Choi, Jin-Seok;Mah, Jae-Pyung;Ko, Chul-Gi;Kim, Dong-Won
    • Korean Journal of Materials Research
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    • v.2 no.1
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    • pp.27-34
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    • 1992
  • Tantalum silicide films are prepared from a composite $TaSi_{28}$ target source and subjected to rapid thermal annealing($500-1100^{\circ}C$, 20sec) in Ar ambient. The formation and the properties of tantalum silicides have been investigated by using 4-point probe, x-ray diffraction, scanning electron microscope(SEM), Auger electron spectroscope(AES), and ${\alpha}$-step. It has been found that the sample annealed above $700^{\circ}C$ forms a polycrystalline $TaSi_2$ phase, and grains grow in granular form regardless of the kind of substrates. The mechanism of the formation of tantalum silicide is the nucleation and growth by Ta-Si short range reaction. The tantalum silicide film has the relatively low resistivity($70-72.5{\mu}{\Omega}-cm$) and smooth surface roughness.

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Characterization of Composite Silicide Obtained from NiCo-Alloy Films (코발트/니켈 합금박막으로부터 형성된 복합실리사이드)

  • Song Ohsung;Cheong Seonghwee;Kim Dugjoong
    • Korean Journal of Materials Research
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    • v.14 no.12
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    • pp.846-850
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    • 2004
  • NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.

Characteristics and Microstructure of Co/Ni Composite Silicides on Polysilicon Substrates with Annealing Temperature (폴리실리콘 기판 위에 형성된 코발트 니켈 복합실리사이드 박막의 열처리 온도에 따른 물성과 미세구조변화)

  • Kim, Sang-Yeob;Song, Oh-Sung
    • Korean Journal of Materials Research
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    • v.16 no.9
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    • pp.564-570
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    • 2006
  • Silicides have been required to be below 40 nm-thick and to have low contact resistance without agglomeration at high silicidation temperature. We fabricated composite silicide layers on the wafers from Ni(20 nm)/Co(20 nm)/poly-Si(70 nm) structure by rapid thermal annealing of $700{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance, surface composition, cross-sectional microstructure, and surface roughness were investigated by a four point probe, a X-ray diffractometer, an Auger electron spectroscopy, a field emission scanning electron microscope, and a scanning probe microscope, respectively. The sheet resistance increased abruptly while thickness decreased as silicidation temperature increased. We propose that the fast metal diffusion along the silicon grain boundary lead to the poly silicon mixing and inversion. Our results imply that we may consider the serious thermal instability in designing and process for the sub-0.1 um CMOS devices.

Reaction Stability of Co/Ni Composite Silicide on Side-wall Spacer with Silicidation Temperatures (Co/Ni 복합 실리사이드 제조 온도에 따른 측벽 스페이서 물질 반응 안정성 연구)

  • Song, Oh-Sung;Kim, Sang-Yeob;Jung, Young-Soon
    • Journal of Surface Science and Engineering
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    • v.38 no.3
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    • pp.89-94
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    • 2005
  • We investigate the reaction stability of cobalt and nickel with side-wall materials of $SiO_2\;and\;Si_3N_4$. We deposited 15nm-Co and 15nm-Ni on $SiO_2(200nm)/p-type$ Si(100) and $Si_3N_4(70 nm)/p-type$ Si(100). The samples were annealed at the temperatures of $700\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The sheet resistance, shape, and composition of the residual materials were investigated with a 4-points probe, a field emission scanning electron microscopy, and an AES depth profiling, respectively. Samples of annealed above $1000^{\circ}C$ showed the agglomeration of residual metals with maze shape and revealed extremely high sheet resistance. The Auger depth profiling showed that the $SiO_2$ substrates had no residual metallic scums after $H_2SO_4$ cleaning while $Si_3N_4$ substrates showed some metallic residuals. Therefore, the $SiO_2$ spacer may be appropriate than $Si_3N_4$ for newly proposed Co/Ni composite salicide process.