• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1140-1140
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• 2015

In this paper, the MIM thin films were deposited on Si substrate by sputtering method. And MIM thin films were annealed at $400{\sim}600^{\circ}C$ using RTA. The capacitance density of MIM thin films were increased with the increase of annealing temperature. The maximum capacitance density of $0.62{\mu}F/cm^2$ was obtained by annealing temperature at $600^{\circ}C$. The voltage dependence of dielectric loss showed about 0.03 in voltage ranges of -10~+10 V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.2
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• pp.118-123
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• 2007

The purpose of this work was to investigate the design and fabrication process effects on electrical properties in high capacitance multilayer ceramic capacitor (MLCC) with nickel electrode. Dielectric breakdown voltage and insulation resistance value were decreased with increasing stack layer number, but dielectric constant and capacitance were increased. With increasing green sheet thickness, dielectric breakdown voltage, C-V and I-V properties were also increased. The major reasons of the effects were thought to be the defects generated extrinsically during fabrication process and interfacial reactions formed between nickel electrode and dielectric layer. These investigations clearly showed the influence of both green sheet thick ness and stack layer number on the electrical properties in fabricating the MLCC.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.84-87
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• 2003

Carbon nitride ($CN_x$) films were prepared by reactive RF magnetron sputtering system with DC bias at various deposition conditions and the electrical properties were investigated. The films were characterized by fourier transform infrared (FTIR) spectroscopy, and X-ray photoelectron spectroscopy (XPS). The metal-insulator-semiconductor (MIS) capacitor which has $Al/CN_x/Si$ structure was designed and fabricated to investigate the capacitance-voltage (C-V) characteristics. Dielectric constant of carbon nitride films is very small.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.99-102
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• 2005

In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

• Transactions on Electrical and Electronic Materials
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• v.2 no.1
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• pp.16-21
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• 2001

A new technique to measure low level capacitance variations of a gyroscope is proposed. It is based on the improved CVC(capacitance to voltage converter) biased by a d.c. current source and the peak detector without any low pass filter. This setup of the measurement system makes it possible to provide higher speed of measurement and wide operation range. The d,c, drift of the conventional CVC and stray capacitances are automatically compensated. Key parameters that affect the performance of the measurement system are illustrated and computer simulation results are presented. The demonstrated measurement system for micromachined gyroscope applications shows a linearity of 0.99972 and a resolution of 0.67fF from 10 fF to 120 fF at 10 kHz.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.2
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• pp.173-179
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• 2003

In this paper, a novel on-line dc capacitance estimation method for the three-phase PWM converter is proposed. At no load, input current at a low frequency is injected, which causes dc voltage ripple. With the at voltage and current ripple components of the dc side, the capacitance can be calculated. Experimental result shows that the estimation error is less than 2%.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.12
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• pp.1877-1879
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• 2012

Generally, stray capacitance is unnecessary element of designing circuit, because it can not be predicted by a designer. But we propose LC Resonant Circuit using stray capacitance of transformer. This method proposes miniaturization of circuit, because LC Resonant Circuit can be make simply to using stray capacitance instead of capacitor and size of transformer is reduced. Finally, we research aspect of dielectric heating by change of frequency and output voltage using developed converter.

• Applied Science and Convergence Technology
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• v.24 no.2
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• pp.33-40
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• 2015

$ZrO_2$ and Al-Zr composite oxide film was prepared by vacuum assisted sol-gel dip coating method and anodizing. $ZrO_2$ films annealed above $400^{\circ}C$ have tetragonal structure. $ZrO_2$ layers inside etch pits were successfully coated from the $ZrO_2$ sol. The double layer structures of samples were obtained after being anodized at 100 V to 600 V. From the TEM images, it was found that the outer layer was $Al_2O_3$, the inner layer was multi-layer of $ZrO_2$, Al-Zr composite oxide and Al hydrate. The capacitance of $ZrO_2$ coated foil exhibited about 28.3% higher than that of non-coating foil after being anodized at 100 V. The high capacitance of $ZrO_2$ coated foils anodized at 100 V can be attributed to the relatively high percentage of inner layer in total thickness. The electrical properties, such as withstanding voltage and leakage current of coated and non-coated Al foils showed similar values. From the results, $ZrO_2$ and Al-Zr composite oxide is promising to be used as the partial dielectric of high voltage capacitor to increase the capacitance.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.82-88
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• 2014

An available capacitance increasing phase-locked loop(PLL) with two voltage controlled oscillator gains has been proposed. In this paper, the available capacitance of loop filter is increased by using two positive/negative gains of voltage controlled oscillator (VCO). It results in 1/10 reduction in the size of loop filter capacitor. It has been designed with a 1.8V $0.18{\mu}m$ CMOS process. The simulation results show that the proposed PLL has the same phase noise characteristic and a locking time of conventional PLL.

• Nuclear Engineering and Technology
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• v.56 no.6
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• pp.2395-2403
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• 2024

With the rapid development of DC high voltage accelerator, higher requirements have been raised for the design of DC high voltage power supply, requiring more stable high voltage with lower output ripple. Therefore, it also puts forward higher requirements for the parameter design of the voltage doubling rectifier circuit, which is the core component of the DC high voltage power supply. In order to obtain output voltage with better performance, the effects of the working frequency, the stage capacitance and the load resistance on the output voltage of the voltage doubling rectifier circuit are studied in detail by simulation. It can be concluded that the higher the working frequency of the transformer, the larger the stage capacitance, the larger the load resistance and the better the output voltage performance in a certain range. Based on this, a 2.5 MV voltage doubling rectifier circuit driven by a 120 kHz frequency transformer is designed, developed and tested for the power supply of the neutron source device towards BNCT. Experimental results show that this voltage doubling rectifier circuit can satisfy the design requirements, laying a certain foundation for the engineering design of DC high voltage power supply of neutron source device.