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http://dx.doi.org/10.4313/JKEM.2007.20.2.118

Design and Fabrication Process Effects on Electrical Properties in High Capacitance Multilayer Ceramic Capacitor  

Yoon, Jung-Rag (삼화콘덴서공업(주) 연구소)
Woo, Byong-Chul (삼화콘덴서공업(주) 연구소)
Lee, Heun-Young (호서대학교 정보제어공학과)
Lee, Serk-Won (명지대학교 전기공학과)
Publication Information
Journal of the Korean Institute of Electrical and Electronic Material Engineers / v.20, no.2, 2007 , pp. 118-123 More about this Journal
Abstract
The purpose of this work was to investigate the design and fabrication process effects on electrical properties in high capacitance multilayer ceramic capacitor (MLCC) with nickel electrode. Dielectric breakdown voltage and insulation resistance value were decreased with increasing stack layer number, but dielectric constant and capacitance were increased. With increasing green sheet thickness, dielectric breakdown voltage, C-V and I-V properties were also increased. The major reasons of the effects were thought to be the defects generated extrinsically during fabrication process and interfacial reactions formed between nickel electrode and dielectric layer. These investigations clearly showed the influence of both green sheet thick ness and stack layer number on the electrical properties in fabricating the MLCC.
Keywords
MLCC; C-V properties; Dielectric breakdown voltage; Insulation resistance; Green sheet;
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