• Title/Summary/Keyword: Analog performance

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A study on the design of the A-D converter for analog rebalance loop in INS (관성측정장치의 아날로그 재평형 루프에 따르는 A-D 변환기의 설계에 관한 연구)

  • 안영석;김종웅;이의행
    • 제어로봇시스템학회:학술대회논문집
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    • 1987.10b
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    • pp.522-527
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    • 1987
  • This paper describes the hardware of analog-to-digital converter to process the rate output of analog servo loop for the gyro rebalance of INS. The analog-to-digital converter is designed by voltage-to-frequency method which is generally used in INS, and this scheme fits well into the strapdown INS that requires the wide dynamic range and linearity. The output of the designed voltage to frequency converter is tested by computer through the counter and all the factors which affect the performance are considered.

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Analysis of Process and Layout Dependent Analog Performance of FinFET Structures using 3D Device Simulator (3D Device simulator를 사용한 공정과 Layout에 따른 FinFET 아날로그 특성 연구)

  • Noh, SeokSoon;Kwon, KeeWon;Kim, SoYoung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.35-42
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    • 2013
  • In this paper, the analog performance of FinFET structure was estimated by extracting the DC/AC characteristics of the 22 nm process FinFET structures with different layout considering spacer and SEG using 3D device simulator, Sentaurus. Based on the analysis results, layout methods to enhance the analog performance of multi-fin FinFET structures are proposed. By adding the spacer and SEG structures, the drive current of 1-fin FinFET increases. However, the unity gain frequency, $f_T$, reduces by 19.4 % due to the increase in the total capacitance caused by the added spacer. If the process element is not included in multi-fin FinFET, replacing 1-finger with 2-finger structure brings approximately 10 % of analog performance improvement. Considering the process factors, we propose methods to maximize the analog performance by optimizing the interconnect and gate structures.

Trenched-Sinker LDMOSFET (TS-LDMOS) Structure for 2 GHz Power Amplifiers

  • Kim, Cheon-Soo;Kim, Sung-Do;Park, Mun-Yang;Yu, Hyun-Kyu
    • ETRI Journal
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    • v.25 no.3
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    • pp.195-202
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    • 2003
  • This paper proposes a new LDMOSFET structure with a trenched sinker for high-power RF amplifiers. Using a low-temperature, deep-trench technology, we succeeded in drastically shrinking the sinker area to one-third the size of the conventional diffusion-type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power-added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below -40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.

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Design and Simulation of analog controller for 3 Phase PWM Converter Based on Stationary Reference Frame (3상 PWM Converter를 위한 정지 좌표계법 Analog 제어기 설계 및 시뮬레이션)

  • 이영국;노철원;최종률
    • Proceedings of the KIPE Conference
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    • 1997.07a
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    • pp.14-20
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    • 1997
  • Due to several advantages of Pulse Width Modulated(PWM) Converter, such as unity power factor with low-harmonics and energy regeneration, PWM converter has been widely used in industrial application. In every application of energy conversion equipment, the design and implementation must be carried out considering performance and cost. High quality with low cost is the best choice for energy conversion equipment. High dc link voltage can reduce inverter and motor side losses and system dimension compare to low dc link voltage. Analog controller can make PWM converter cheaper without considerable degradation of the performance than digital controller. This paper shows the simplified analog controller-for 600V dc link voltage using stationary reference frame control and the simulation results.

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Feed forward Differential Architecture of Analog Parallel Processing Circuits for Analog PRML Decoder (아날로그 PRML 디코더를 위한 아날로그 병렬처리 회로의 전향 차동 구조)

  • Sah, Maheshwar Pd.;Yang, Chang-Ju;Kim, Hyong-Suk
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.8
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    • pp.1489-1496
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    • 2010
  • A feed forward differential architecture of analog PRML decoder is investigated to implement on analog parallel processing circuits. The conventional PRML decoder performs the trellis processing with the implementation of single stage in digital and its repeated use. The analog parallel processing-based PRML comes from the idea that the decoding of PRML is done mainly with the information of the first several number of stages. Shortening the trellis processing stages but implementing it with analog parallel circuits, several benefits including higher speed, no memory requirement and no A/D converter requirement are obtained. Most of the conventional analog parallel processing-based PRML decoders are differential architecture with the feedback of the previous decoded data. The architecture used in this paper is without feedback, where error metric accumulation is allowed to start from all the states of the decoding stage, which enables to be decoded without feedback. The circuit of the proposed architecture is simpler than that of the conventional analog parallel processing structure with the similar decoding performance. Characteristics of the feed forward differential architecture are investigated through various simulation studies.

Parallel Structure of Viterbi Decoder for High Performance of PRML Signal (PRML신호용 고성능 Viterbi Decoder의 병렬구조)

  • Seo, Beom-Soo;Kim, Jong-Man;Kim, Hyong-Suk
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.58 no.4
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    • pp.623-626
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    • 2009
  • In this paper, we applied new analog viterbi decoder to decode PR(1,2,2,1) signal for DVD and analyze the specific and signal characteristics. We implemented the parallel analog viterbi decoder and the convolution digital viterbi decoder(the digital PRML) utilizing the technology of analog parallel processing circuits. The proposed analog viterbi decoder can replace the conventional digital viterbi decoder by a new one. Our circuits design the low distortion and the high accuracy over the previous implementation. Through the parallel structure of the proposed viterbi decoder, we got the achievement of the decoding speed by the multiple times.

Simulation of HTS RSFQ A/D Converter and its Layout (고온 초전도 RSFQ A/D 변환기의 시물레이션과 설계)

  • 남두우;정구락;강준희
    • Progress in Superconductivity and Cryogenics
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    • v.4 no.1
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    • pp.8-12
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    • 2002
  • Since the high performance analog-to-digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Sng1e Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter.

A CMOS Digital-to-Analog Converter to Apply a Newly-Developed Digital-to-Analog Conversion Algorithm (새로운 디지털-아날로그 변환알고리즘을 적용한 CMOS 디지털-아날로그 변환기)

  • 송명호
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.57-63
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    • 1998
  • This paper describes a CMOS digital-to-analog converter to apply a newly-developed digital-to-analog conversion algorithm. The CMOS digital-to-analog converter has been designed by using 1.2$\mu\textrm{m}$ MOSIS SCMOS parameter and simulated for the performance. The simulated results have shown that the digital-to-analog converter has 200MHz of the maximum conversion rate, 7.41mW of the DC power consumption, and ${\pm}$0.08LSB of INL and ${\pm}$0.098LSB of DNL in 8-b.

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Retrofit of Analog Boiler Control Systems with Digital Control Systems in a Thermal Power Plant

  • Park, Doo-Yong;Byun, Seung-Hyun
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.1304-1308
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    • 2005
  • This paper presents the case that the existing analog control systems were retrofitted with digital DCS(Distributed Control System)s for boiler unit in thermal power plant. Replacement of existing worn-out or obsolete analog control systems has been considered. Replacement of existing analog control systems with another analog control systems has lots of difficulties in maintaining the systems due to being out of stock. Due to those difficulties, existing analog control systems have been retrofitted with digital DCSs in many industrial sites. KEPRI(Korea Electric Power Research Institute) accomplished the project that retrofitted analog control systems with the developed DCSs for boiler unit in middle-scale coal-fired thermal power plant. The benefits of an upgrade to digital control include a increase of reliability due to system redundancy, ease of modifying the control logic and the parameters of function block, ease of maintenance due to available spare parts, improvement of information display, ease of modifying MMI(Man Machine Interface) displays, a increase in system availability, and improvement of control performance. This paper describes how to use the parameters of existing analog controllers, the implementation of digital PID controller, control system configuration for boiler unit in thermal power plant, some boiler control loops, control result during commissioning, and the comparison of boiler characteristic test data after retrofitting with the existing test data.

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