References
- IEEE Trans. on Electron Devices v.ED-21 Si UHF MOS High power FET Morita, Y.;Takahashi, H.;Matayoshi, H.;Fukuta, M.
- IEDM Tech. Digest High Performance Silicon LDMOS Technology for 2GHz RF Power Amplifier Applications Wood, A.;Dragon, C.;Burger, W.
- RAWCON Proc. Application of RF LDMOS Power Transistor for 2.2 GHz Wideband-CDMA Wood, A.;Brakensiek, W.
- IEDM Tech. Digest RF LDMOS with Extreme Low Parasitic Feedback Capacitance and High Hot-Carrier Immunity Xu, S.;Foo, P.;Wen, J.;Liu, Y.;Lin, F.;Ren, C.
- Proc. of ESSDERC 1996 A Highly Efficient 1.9GHz Si Power MOSFET Yoshida, I.;Katsueda, M.;Maruyama, Y.;Kohjiro, I.
- IEDM Tech. Digest High Efficiency LDMOS Power FET for Low Voltage Wireless Communication Ma, G.;Burger, W.;Dragon, C.;Gillenwater, T.
- ETRI J. v.24 no.5 A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters Kim, Jong-Dae(et al.)
- IEDM Tech. Digest 2001 Trenched Sinker LDMOSFET (TS-LDMOS) Structure for High Power Amplifier Application above 2 GHz Kim, Cheon-Soo;Park, Joung-Woo;Yu, Hyun-Kyu
-
IEEE IMS Digest 2001
$A 0.18{\mu}m$ Foundry RF CMOS Technology with 79 GHzfT for Single Chip Solution Hsu, H.M.(et al.) - Proc. of ISPSD 1992 Highly Efficient 1.5 GHz Si Power MOSFET for Digital Cellular Front End Yoshida, I.;Katsueda, M.;Ohtaka, S.;Maruyama, Y.;Okabe, T.
- ETRI J. v.21 no.4 Thick Metal CMOS Technology on High Resistivity SubstrateAnd Its Application to Monolithic L-band CMOS LNAs Kim, Cheon-Soo;Park, Min;Kim, Chung-Hwan;Yu, Hyun-Kyu;Lee, Ky-Ro;Cho, Han-Jin
- IEEE Journal of Solid State Circuits v.33 no.6 Substrate Noise Coupling Through Planar Spiral Inductor Pun, A.L.L.;Yeung, T.;Lau, J.;Clement, F.J.R.;Su, D.K.
- IEEE Journal of Solid State Circuits v.33 no.12 RF Circuit Design Aspects of Spiral Inductors on Silicon Burghartz, J.N.;Edelstein, D.C.;Soyuer, M.;Ainspan, H.A.;Jenkins, K.A.
- IEEE Journal of Solid State Circuits v.28 no.4 Experimental Results and Modeling Techniques for Substrate Noise in Mixedsignal Integrated Circuits Su, D.K.;Loinaz, M.J.;Masui, S.;Wooley, B.A.
- IEEE MTT-s Digest 2001 Deep Trench Guard Technology to Suppress Coupling between Inductors in Silicon RF ICs Kim, C.S.;Park, M.;Park, J.W.;Yu, H.K.
- IEDM Tech. Digest 2000 A High Aspect-Ratio Silicon Substrate-Via Technology and Applications: Through-Wafer Interconnects for Power and Ground and Faraday Cages for SOC Isolation Wu, Joyce H.;del Alamo, Jesus A.;Jenkins, Keith A.