• Proceedings of the KAIS Fall Conference
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• 2008.05a
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• pp.251-253
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• 2008

RFID 태그에 통신 기능이 부가되고 점차 주위 환경을 감지하는 센싱 기능이 부가되면, 능동적으로 정보를 처리하는 지능형 초소형 스마트 센서 네트워크로 발전되어 현재의 고정된 개체 인식 코드 획득 수준에서 다기능 태그에 의한 상황인지 처리 수준으로 진화하여, 개체간 통신 기능을 갖춘 지능형 USN으로 발전할 것으로 전망 된다. ZigBee는 기기간 센서 네트워크를 구성, 단순 제어와 관리를 수행할 수 있는 WPAN의 최적의 기술로 평가 받고 있으며 저 전력, 저가 등의 장점 등으로 시장 성장성이 높은 기술이다. 유/무선 인프라를 확보하고 있는 우리는 ZigBee를 기존, 또는 현재 구축중인 유무선 네트워크와 연결해 다양한 유비쿼터스 서비스를 개발할 수 있는 최적의 테스트베드 환경을 갖추고 있으므로 u-Health의 기반에 꼭 필요한 기술이다.

• Journal of Korea Society of Industrial Information Systems
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• v.24 no.1
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• pp.31-38
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• 2019

In this paper, we develop a beamforming front end platform with pipeline circuit configuration method that can apply various clinical diagnostic applications of ultrasound image technology. Hardware design targets compression applications as well as scalable applications where power, integration levels and replication possibilities are important. Firmware design was implemented to achieve optimal FPGA parallel processing level by constructing new IP and system-oriented design environment to accelerate design productivity with maximum productivity improvement using Vivado HLS tool, which is a next generation high level synthesis tool. Former supports the high-speed management function of scan data that can create an image area arbitrarily and can be appropriately corrected and supplemented when reconfiguring or changing system specifications in the future.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.7-13
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• 2009

This paper presents a multi-channel transceiver that achieves a data rate of 3.125Gb/s/ch. The LVDS is used because of its noise immunity and low power consumption. And a pre-emphasis circuit is also proposed to increase the transmitter speed. On the receiver side, a low-power CDR(clock and data recovery) using 1/4-rate clock based on dual-interpolator is proposed. The CDR generates needed additional clocks in each recovery part internally using only inverters. Therefore each part can be supplied with the same number of 1/4-rate clocks from a clock generator as in 1/2-rate clock method. Thus, the reduction of a clock frequency relaxes the speed limitation and lowers power dissipation. The prototype chip is comprised of two channels and was fabricated in a $0.18{\mu}m$ standard CMOS process. The output jitter of transmitter is loops, peak-to-peak(0.31UI) and the measured recovered clock jitter is 47.33ps, peak-to-peak which is equivalent to 3.7% of a clock period. The area of the chip is $3.5mm^2$ and the power consumption is about 119mW/ch.

• Proceedings of the Korean Information Science Society Conference
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• 2008.06d
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• pp.455-460
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• 2008

건설교통부는 국가미래에 대비해 실질적으로 기여할 수 있는 전략적이고 중장기적인 실효성 있는 R&D 혁신 로드맵인 VC-10 사업을 진행하고 있다. 이 과제의 핵심 기술 중에 하나인 유비쿼터스 센서네트워크는 초소형 센서들로 구성된 망으로써 환경 및 재난 재해, u-City 건설, 스마트 하이웨이, 방범 및 국방, 시설 관리, 유통, 등과 같은 다양한 분야에 사용할 수 있는 유비쿼터스 사회의 핵심 요소이다. 이것은 실시간 네트워크를 통해 전송 또는 관리되고 언제, 어디서나, 어떠한 대상과 의사소통이 가능한 지능형 컴퓨팅 환경을 구현하는 것이다. 그러나 이러한 기술을 바탕으로 하는 기존의 시스템들은 특정분야를 위한 독자적인 프로토콜이나 저전력 통신을 제공하는 ZigBee 기반으로 설계되었기 때문에 소규모 범위에서만 서비스 제공이 가능하며 시스템간의 연동이 어렵다. 따라서 본 논문에서는 유비쿼터스 센서네트워크간의 연동성을 고려한 대규모 실시간 모니터링 시스템을 설계하여 다양한 분야로 서비스할 수 있는 테스트베드 구축에 대한 방안을 제시하고자 한다. 여기서 모니터링 대상은 국토의 지반, 환경, 그리고 도심지역 등이다. 이렇게 제시된 방안은 국내실정에 적합한 모니터링 시나리오를 작성하여 테스트베드를 구축 시에 요구된 사항들에 대한 정당성을 입증한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.289-292
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• 2008

This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of OpenRISC processor and a clock gating algorithm using ODC (Observability Don't Care) operation for a low-power processor. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC processor using the proposed algorithm is improved about 8.9% and dynamic power of the processor using samsung $0.18{\mu}m$ technology library is reduced by 13.9%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.7
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• pp.977-985
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• 2021

The LiDAR sensor is attracting attention as a key sensor for autonomous driving vehicle. LiDAR sensor provides measured three-dimensional lengths within range using LASER. However, as much data is provided to the external system, it is difficult to process such data in an external system or processor of the vehicle. To resolve these issues, we develop integrated processing system for LiDAR sensor. The system is configured that client receives data from LiDAR sensor and processes data, server gathers data from clients and transmits integrated data in real-time. The test was carried out to ensure real-time processing of the system by changing the data acquisition, processing method and process driving method of process. As a result of the experiment, when receiving data from four LiDAR sensors, client and server process was operated using background or multi-core processing, the system response time of each client was about 13.2 ms and the server was about 12.6 ms.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.11A
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• pp.1263-1270
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• 2004

A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz＠2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz＠2.5-V.

• Proceedings of the Korean Society of Computer Information Conference
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• 2016.01a
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• pp.129-132
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• 2016

IT분야의 하드웨어 발달에 따라 저전력, 저가 및 센싱 및 통신이 가능한 IoT 디바이스들 출시 되고, 이를 이용한 새로운 솔루션 제품들이 출시되면서 IoT 시장 규모가 급격히 확대 되고 있다. 본 논문에서는 이러한 IoT 기기들의 연동을 통한 시너지 효과를 극대화 할 수 있는 상황 인식 추론 시스템의 설계 및 구현에 대해 서술한다. 해당 시스템은 상황 인식을 위한 상황 정보를 기존의 상황 인식 시스템과는 달리 클라이언트 기기에서 규격화 하여 서버로 전송한다. 이러한 이기종 데이터의 규격화는 RDF 문서의 정보 표기 방법인 Triple을 이용해 이루어진다. 이후, 서버로 전송된 상황 정보는 추론 엔진을 통해 현재 상황에 대한 추론 결과를 도출하고, 사용자에 의해 입력된 룰을 기반으로 상황에 적합한 서비스를 제공한다. 해당 시스템의 정상 동작 확인 여부를 위해, 본 논문에서는 방범 시나리오를 설정하여 테스트를 진행하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.239-246
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• 2014

In the context of wireless sensor networks, one of major issues is energy conservation. For low power communication, by utilizing our experimental results for the relation between clock drift and synchronization interval, we designed a new protocol which can support a wide range of duty cycles for applications with very low traffic rate and insensitive delay. The transmission (TX) node in the protocol synchronizes with the reception (RX) node very before transmitting a packet, and it can adaptively estimate the synchronization error size according to the synchronization interval from minutes to hours. We conducted simulations and a testbed implementation to show the efficacy of the proposed protocol. We found that our protocol substantially outperforms other state-of-the-art protocols, resulting in order-of-magnitude increase in network lifetime over a variety of duty cycles.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.11
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• pp.2442-2450
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• 2010

Using sensor devices applied to various objects will be needed wireless network that it is easy to install in them. Tiny devices configured to processor that bas comparatively low computing ability are inappropriate to use devices that are wireless LAN, etc. In result, network devices needed to not only have simple communication protocol, but have Plug and Play function that it works as soon as it connects without installing any device driver. it also will industrially have both low power and low cost because of mobility of it. From IEEE 802.11 standard, WPAN(Wireless Personal Area Network) included in LAN is being developed by WPAN WG(Working Group) on area with low power consumption and low complexity. In addition to, it is standardizing MAC and PRY of the standard that is expected to wirelessly communicate within 10m. WPAN will be used generally in the more near future because of both low power and low cost of Zigbee. In this paper we designed zigbee based user authentication module for a automotive smart-key system.