• Title/Summary/Keyword: 시스템-온-칩

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60dB 0.18μm CMOS Low-Power Programmable Gain Amplifier (60dB 0.18μm CMOS 저전력 이득 조절 증폭기)

  • Park, Seung-Hun;Lee, Jung-Hoon;Kim, Cheol-Hwan;Ryu, Jee-Youl
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.05a
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    • pp.349-351
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    • 2013
  • This research paper presents a low-power programmable gain amplifier (PGA) to facilitate signal processing of the detection of defects in steel plates. This circuit is able to adjust a gain in the range of 6 to 60dB in 7 steps using different signal types for various defects from hall sensors. The gain of PGA is designed by operating on-resistors of switches and passive components. The proposed PGA ($0.18{\mu}m$ CMOS process with 1.8 supply voltage) showed excellent gain error of less than -0.2dB, and low power consumption of 0.47mW.

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At-speed Interconnect Test Controller for SoC with Multiple System Clocks and Heterogeneous Cores (다중 시스템 클럭과 이종 코아를 가진 시스템 온 칩을 위한 연결선 지연 고장 테스트 제어기)

  • Jang Yeonsil;Lee Hyunbin;Shin Hyunchul;Park Sungju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.5 s.335
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    • pp.39-46
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    • 2005
  • This paper introduces a new At-speed Interconnect Test Controller (ASITC) that can detect and diagnose dynamic as well as static defects in an SoC. SoC is comprised of IEEE 1149.1 and P1500 wrapped cores which can be operated by multiple system clocks. In other to test such a complicated SoC, we designed a interface module for P1500 wrapped cores and the ASITC that makes it possible to detect interconnect delay faults during 1 system clock from launching to capturing the transition signal. The ASITC proposed requires less area overhead than other approaches and the operation was verified through the FPGA implementation

A Study on Home's Emergency Monitoring System Using Embedded System (임베디드 시스템을 이용한 가택의 긴급상황 감시 시스템에 대한 연구)

  • 최재우;양승현;노방현;황희융
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.1
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    • pp.60-64
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    • 2004
  • In this paper, we implemented a real-time remote home monitoring system which we have ported the Linux OS and HTTP(Hypertext Transfer Protocol) web server. The GoAhead web server was ported using by ARM cross compiler. And then we used the analog to digital converter ADC0809 for sensing the vii able input signal at widely separated home. We have implemented linux device driver for ADC(Analog to Digital Convertor) and CGI-C(Common Gateway Interface - C language) application program using Client pull method for monitoring real-time changing data. The factor of monitoring is temperature, intensity of illumination and gas's existence. And this system has ability which check the status of out door and gas valve. We have designed the embedded web server system for home emergency monitoring in low cost.

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Design and Implementation of a new aging sensing circuit based on Flip-Flops (플립플롭 기반의 새로운 노화 센싱 회로의 설계 및 구현)

  • Lee, Jin-Kyung;Kim, Kyung Ki
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.4
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    • pp.33-39
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    • 2014
  • In this paper, a new on-chip aging sensing circuit based on flip-flops is proposed to detect a circuit failure of MOSFET digital circuits casued by aging phenomenon such as HCI and BTI. The proposed circuit uses timing windows to warn against a guardband violation of sequential circuits, and generates three warning bits right before circuit failures occur. The generated bits can apply to an adaptive self-tuning method for reliable system design as control signals. The aging sensor circuit has been implemented using 0.11um CMOS technology and evaluated by $4{\times}4$ multiplier with power gating structure.

Effects of Cell Wall on the Transformation of Microalgae by a Digital Microfluidic System (디지털 미세유체를 이용한 미세녹조류 형질전환에서의 세포벽의 영향 분석)

  • Im, Do Jin
    • Clean Technology
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    • v.21 no.2
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    • pp.90-95
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    • 2015
  • Digital microfluidic electroporation system was used for the transformation of microalgae and we have obtained higher transformation efficiency and viability than that of conventional method. Key parameters of electroporation such as pulse voltage, number, and duration time were systematically investigated for two different microalgal strains with and without cell wall. We have found that cell wall does not always have negative effects on the gene transformation of microalgae. Parallel processing of proposed digital microfluidic electroporation was demonstrated together with on chip culture of microalgae.

An Efficient Technique to Improve Compression for Low-Power Scan Test Data (저전력 테스트 데이터 압축 개선을 위한 효과적인 기법)

  • Song, Jae-Hoon;Kim, Doo-Young;Kim, Ki-Tae;Park, Sung-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.104-110
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    • 2006
  • The huge test data volume, test time and power consumption are major problems in system-on-a-chip testing. To tackle those problems, we propose a new test data compression technique. Initially, don't-cares in a pre-computed test cube set are assigned to reduce the test power consumption, and then, the fully specified low-power test data is transformed to improve compression efficiency by neighboring bit-wise exclusive-or (NB-XOR) scheme. Finally, the transformed test set is compressed to reduce both the test equipment storage requirements and test application time.

Efficient AMBA Based System-on-a-chip Core Test With IEEE 1500 Wrapper (IEEE 1500 래퍼를 이용한 효과적인 AMBA 기반 시스템-온-칩 코아 테스트)

  • Yi, Hyun-Bean;Han, Ju-Hee;Kim, Byeong-Jin;Park, Sung-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.61-68
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    • 2008
  • This paper introduces an embedded core test wrapper for AMBA based System-on-Chip(SoC) test. The proposed test wrapper is compatible with IEEE 1500 and can be controlled by ARM Test Interface Controller(TIC). We use IEEE 1500 wrapper boundary registers as temporal registers to load test results as well as test patterns and apply a modified scan test procedure. Test time is reduced by simultaneously performing primary input insertion and primary output observation as well as scan-in and scan-out.

Voltage Selection Methodology for DVFS Overhead Minimization (동적 전압 주파수 스케일링 오버헤드 최소화를 위한 전압 선택 방법론)

  • Chang, Jin Kyu;Han, Tae Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.854-857
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    • 2015
  • As the number of devices integrated on system-on-chip(SoC) increases exponentially, energy reduction technology is essential. Dynamic Voltage and Frequency Scaling (DVFS) is a very effective technique for reducing power consumption. Since it requires complex voltage regulators and PLL circuits, DVFS tends to have significant overheads. In this paper, we propose a new voltage selection algorithm to minimize transition overhead for multiprocessor SoC (MPSoC). Simulation results show that proposed algorithm appears less energy consumption with transition overhead even though maintains performance.

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A New Automatic Compensation Circuit for Low Noise Amplifiers (저잡음 증폭기를 위한 새로운 자동 보상 회로)

  • Ryu, Jee-Youl;Deboma, Gilbert D.;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.995-998
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    • 2005
  • This paper proposes a new SoC (System-on-Chip)-based automatic compensation circuit (ACC) for 5GHz low noise amplifier (LNA). This circuit is extremely useful for today's RF IC (Radio Frequency Integrated Circuit) devices in a complete RF transceiver environment. The circuit contains RF BIST (Built-ln Self-Test) circuit, Capacitor Mirror Banks (CMB) and digital processing unit (DPU). The ACC automatically adjusts performance of 5GHz LNA by the processor in the SoC transceiver when the LNA goes out of the normal range of operation.

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Development of Real-Time COF Film Complex Inspection System using Color Image (컬러영상을 이용한 실시간 COF 필름 복합 검사시스템 개발)

  • Kim, Yong-Kwan;Lee, In Hwan
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.20 no.10
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    • pp.112-118
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    • 2021
  • In this study, an inspection method using a color image is proposed to conduct a real-time inspection of covalent organic framework (COF) films to detect defects, if any. The COF film consists of an upper pattern SR and a lower PI. The proposed system detects the defects of more than 20 ㎛ on the SR surface owing to the characteristics of the pattern, whereas on the PI surface, it detects defects of more than 4 ㎛ by utilizing a micro-optical system. In the existing system, it is difficult for the operator to conduct a full inspection through a high-performance microscope. The proposed inspection algorithm performs the inspection by separating each color component using the color contrast of the pattern on the SR side, and on the PI surface it inspects the bonding state of the mounted chip. As a result, it is possible to confirm the exact location of the defects through the SR and PI surface inspections in the implemented inspection.