• Title/Summary/Keyword: tunnel field-effect-transistor(TFET)

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A Recessed-channel Tunnel Field-Effect Transistor (RTFET) with the Asymmetric Source and Drain

  • Kwon, Hui Tae;Kim, Sang Wan;Lee, Won Joo;Wee, Dae Hoon;Kim, Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.635-640
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    • 2016
  • Tunnel field-effect transistor (TFET) is a promising candidate for the next-generation electron device. However, technical issues remain for their practical application: poor current drivability, shor-tchannel effect and ambipolar behavior. We propose herein a novel recessed-channel TFET (RTFET) with the asymmetric source and drain. The specific design parameters are determined by technology computer-aided design (TCAD) simulation for high on-current and low S. The designed RTFET provides ${\sim}446{\times}$ higher on-current than a conventional planar TFET. And, its average value of the S is 63 mV/dec.

Potential Model for L shaped Tunnel Field-Effect-Transistor

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.170-171
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    • 2016
  • A surface potential model is introduced for L-shaped tunnel field-effect-transistor(L-TFET). Excellent agreement is obtained when model results are compared with TCAD data.

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Investigation of Junction-less Tunneling Field Effect Transistor (JL-TFET) with Floating Gate

  • Ali, Asif;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.156-161
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    • 2017
  • This work presents a novel structure for junction-less tunneling field effect transistor (JL-TFET) with a floating gate over the source region. Introduction of floating gate instead of fixed metal gate removes the limitation of fabrication process suitability. The proposed device is based on a heavily n-type-doped Si-channel junction-less field effect transistor (JLFET). A floating gate over source region and a control-gate with optimized metal work-function over channel region is used to make device work like a tunnel field effect transistor (TFET). The proposed device has exhibited excellent ID-VGS characteristics, ION/IOFF ratio, a point subthreshold slope (SS), and average SS for optimized device parameters. Electron charge stored in floating gate, isolation oxide layer and body doping concentration are optimized. The proposed JL-TFET can be a promising candidate for switching performances.

Source-Overlapped Gate Length Effects at Tunneling current of Tunnel Field-Effect Transistor (소스영역으로 오버랩된 게이트 길이 변화에 따른 터널 트랜지스터의 터널링 전류에 대한 연구)

  • Lee, Ju-Chan;Ahn, Tae-Jun;Sim, Un-Sung;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.611-613
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    • 2016
  • The characteristics of tunnel field-effect transistor(TFET) structure with source-overlapped gate was investigated using a TCAD simulations. Tunneling is mostly divided into line-tunneling and point-tunneling, and line-tunneling is higher performance than point-tunneling in terms of subthreshold swing(SS) and on-current. In this paper, from the simulation results of source-overlapped gate length effects at silicon(Si), germanium(Ge), Si-Ge hetero TFET structure, the guideline of optimal structure with highest performance are proposed.

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Channel Doping Effect at Source-Overlapped Gate Tunnel Field-Effect Transistor (소스 영역으로 오버랩된 TFET의 Channel 도핑 변화 특성)

  • Lee, Ju-Chan;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.527-528
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    • 2017
  • Current-voltage characteristics of source-overlapped gate tunnel field-effect transistor (SOG-TFET) with different channel doping concentration are proposed. Due to the gaussian doping in which the channel region near the source is highly doped and that far from the source is lightly doped, the ambipolar current was reduced, compared with the uniformly-doped SOG-TFET. On-current is almost similar in P-P-N and P-I-N structure but subthreshold swing (SS) of P-P-N TFET enhanced 5 times higher than those of P-I-N TFET. off-current and ambiploar current of the proposed SOG-TFET decrease 10 times and 100 times than those of the uniformly-doped SOG-TFET.

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Comparative Investigation on Tunnel Field Effect transistors(TFETs) Structure (터널링 전계효과 트랜지스터 구조 특성 비교)

  • Shim, Un-Seong;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.616-618
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    • 2016
  • Four types of structure of tunnel field-effect transistors (TFETs) have been investigated by TCAD simulation. Pocket and L-shaped TFETs are better performance than single-gate and double-gate TFETs in terms of on-current and subthreshold swing. New guideline of TFETs is presented for the structure design.

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An Analytical Modeling and Simulation of Dual Material Double Gate Tunnel Field Effect Transistor for Low Power Applications

  • Arun Samuel, T.S.;Balamurugan, N.B.
    • Journal of Electrical Engineering and Technology
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    • v.9 no.1
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    • pp.247-253
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    • 2014
  • In this paper, a new two dimensional (2D) analytical modeling and simulation for a Dual Material Double Gate tunnel field effect transistor (DMDG TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunnelling generation rate and thus we numerically extract the tunnelling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.

Compact Model of Tunnel Field-Effect-Transistors

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.160-162
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    • 2016
  • A compact model of tunnel field effect transistor (TFET) has been developed. The model includes a surface potentia calculation module and a band-to-band-tunneling current module. Model comparison with TCAD shows that the mode calculates TFET surface potential and drain current accurately.

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Study on Point and Line Tunneling in Si, Ge, and Si-Ge Hetero Tunnel Field-Effect Transistor (Si, Ge과 Si-Ge Hetero 터널 트랜지스터의 라인 터널링과 포인트 터널링에 대한 연구)

  • Lee, Ju-chan;Ann, TaeJun;Sim, Un-sung;Yu, YunSeop
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.876-884
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    • 2017
  • The current-voltage characteristics of Silicon(Si), Germanum(Ge), and hetero tunnel field-effect transistors(TFETs) with source-overlapped gate structure was investigated using TCAD simulations in terms of tunneling. A Si-TFET with gate oxide material $SiO_2$ showed the hump effects in which line and point tunneling appear simultaneously, but one with gate oxide material $HfO_2$ showed only the line tunneling due to decreasing threshold voltage and it shows better performance than one with gate oxide material $SiO_2$. Tunneling mechanism of Ge and hetero-TFETs with gate oxide material of both $SiO_2$ and $HfO_2$ are dominated by point tunneling, and showed higher leakage currents, and Si-TFET shows better performance than Ge and hetero-TFETs in terms of SS. These simulation results of Si, Ge, and hetero-TFETs with source-overlapped gate structure can give the guideline for optimal TFET structures with non-silicon channel materials.

Analytical Modeling and Simulation of Dual Material Gate Tunnel Field Effect Transistors

  • Samuel, T.S.Arun;Balamurugan, N.B.;Sibitha, S.;Saranya, R.;Vanisri, D.
    • Journal of Electrical Engineering and Technology
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    • v.8 no.6
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    • pp.1481-1486
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    • 2013
  • In this paper, a new two dimensional (2D) analytical model of a Dual Material Gate tunnel field effect transistor (DMG TFET) is presented. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expressions for surface potential and electric field are derived. The electric field distribution can be used to calculate the tunneling generation rate and numerically extract tunneling current. The results show a significant improvement of on-current and reduction in short channel effects. Effectiveness of the proposed method has been confirmed by comparing the analytical results with the TCAD simulation results.