• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.27-28
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• 2007

In this paper, Ni-Co alloy was used for improvement of thermal stability of Ni silicide. The proposed Ni/Ni-Co structure exhibited wide temperature window of rapid thermal process. Sheet resistance as well as cross-sectional profile showed stable characteristics in spite of high temperature annealing up to $700^{\circ}C$ for 30min. Therefore, the proposed Ni/Ni-Co structure is highly promising for highly thermal immune Ni silicide for nano-scale CMOSFET technology.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.24-25
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• 2006

In this study, Ni silicide on the SOI substrate doped B11 is proposed to improve thermal stability. The sheet resistance of Ni-silicide utilizing pure SOI substrate increased after the post-silicidation annealing at $600^{\circ}C$ for 30 min. However, using the proposed B11 implanted substrate, the sheet resistance showed stable characteristics after the post-silicidation annealing up to $700^{\circ}C$ for 30 min.

• 한국재료학회지
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• 제18권1호
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• pp.5-11
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• 2008

Thermally evaporated 10 nm-Ni/1 nm-Au/(30 nm-poly)Si structures were fabricated in order to investigate the thermal stability of Au-inserted nickel silicide. The silicide samples underwent rapid thermal annealing at $300{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance was measured using a four-point probe. A scanning electron microscope and a transmission electron microscope were used to determine the cross-sectional structure and surface image. High-resolution X-ray diffraction and a scanning probe microscope were employed for the phase and surface roughness. According to sheet resistance and XRD analyses, nickel silicide with Au had no effect on widening the NiSi stabilization temperature region. Au-inserted nickel silicide on a single crystal silicon substrate showed nano-dots due to the preferred growth and a self-arranged agglomerate nano phase due to agglomeration. It was possible to tune the characteristic size of the agglomerate phase with silicidation temperatures. The nano-thick Au-insertion was shown to lead to self-arranged microstructures of nickel silicide.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.353-353
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• 2010

본 논문에서는 소스와 드레인의 형성에 있어서 implantation 이 아닌 silicide를 형성시켜서 최고온도 $500^{\circ}C$가 넘지않는 저온공정을 실현하였고, silicon-on-insulator (SOI) 기판이 아닌 solid phase crystallization (SPC) 결정화 방법을 이용하여 결정화 시킨 SPC-TFT 기판을 사용하였다. Silicide 의 형성은 pt를 증착하여 furnace에서 열처리를 실시하여 형성하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권2호
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• pp.166-171
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• 2016

Nickel silicide is main issue in Polycrystalline silicon Thin Film Transistor (TFT) which is made by Metal Induced Lateral Crystallization (MILC) method. This Nickel silicide acts as a defect center, and this defect is one of the biggest reason of the high leakage current. In this research, we fabricated polycrystalline TFTs with novel method called Edge Cut (EC). With this new fabrication method, we assumed that nickel silicide at the edge of the channel region is reduced. Electrical properties are measured and trap state density also calculated using Levinson & Proano method.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.434-435
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• 2009

The crystalline silicon solar cell where the solar cell market grows rapidly is occupying of about 85% or more. high-efficiency and low cost endeavors many crystalline silicon solar cells. the fabrication processes of high-efficiency crystalline silicon solar cells necessitate complicated fabrication processes and Ti/Pd/Ag contact, however, this contact formation processed by expensive materials. Ni/Cu contact formation is good alternative. in this paper, according to temperature Ni silicide makes, produced Ni/Cu contact solar cell and measured conversion efficiency.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권4호
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• pp.260-264
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• 2010

In this paper, Ni silicide is formed on boron cluster ($B_{18}H_{22}$) implanted source/drains for shallow junctions of nano-scale CMOSFETs and its thermal stability is improved, using vacuum annealing. Although Ni silicide on $B_{18}H_{22}$ implanted Si substrate exhibited greater sheet resistance than on the $BF_2$ implanted one, its thermal stability was greatly improved using vacuum annealing. Moreover, the boron depth profile, using vacuum post-silicidation annealing, showed a shallower junction than that using $N_2$ annealing.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1069-1072
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• 2003

Germane-sillicide phase formation on S $i_{0.25}$G $e_{0.75}$ with Ni 100$\square$, Co 10$\square$/Ni 100$\square$ and Ni 50$\square$/Co 10$\square$/Ni 50$\square$ layer was studied by sheet resistance and Field Emission Scanning Electron Microscopy(FESEM). Thermal stability of nickel germane-silicide is found to be improved by sputtering Ni/Co/Ni on the SiGe. After annealing at 600, 650, $700^{\circ}C$, 30min., the nickel germane-silicide formed by Ni 50$\square$/Co 10$\square$/Ni 50$\square$ layer achieved a sheet resistance less than 17ohms/sq.(almost the same to the value before furnace annealing for 30min.) , while the process of the other two ways result in high sheet resistance and even sheet resistance fail due to Ge segregation.ion.

• 한국표면공학회지
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• 제27권2호
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• pp.83-90
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• 1994

We have investigated the mechanism for the abnormal oxide growth occuring during oxidation of the crystalline tungsten silicide. TEM and XPS analysis reveal the abnormaly grown oxide layer consisting of crystalline $Wo_3$ and amorphous $SiO_2$. The presence of crystalline $Wo_3$ provides a rapid diffusion of oxygen through the oxide layer. The abnormal oxide growth is mainly due to the poor quality of initial oxide layer growth on tungsten silicide. Two species such as tungsten and silicon from decomposition fo tungsten silicide as well as silicon supplied from the underlying polysilicon are the main contributors sto abnormal oxide forma-tion. Consequently, the abnormal oxidation results in the disintegration of tungsten silicide and thinning of polysilicon as well.

• 한국진공학회지
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• 제1권1호
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• pp.153-161
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• 1992

A plasma has been used in a high vaccum, cold wall reactor for low temperature deposition of C54 TiSi2 and for in-situ surface cleaning prior to silicide deposition. SiH4 and TiCl4 were used as the silicon and titanium sources, respectively. The deposited films had low resistivities in the range of 15~25 uohm-cm. The investigation of the experimental variables' effects on the growth of silicide and its concomitant silicon consumption revealed that and were the dominant species for silicide formation and the primary factors in silicon consumption were gas composition ratio and temperature. Increasing silane flow rate from 6 to 9 sccm decreased silicon consumption from 1500 A/min to less than 30 A/min. Furthermore, decreasing the temperature from 650 to $590^{\circ}C$ achieved blanket silicide deposition with no silicon consumption. A kinetic model of silicon consumption is proposed to understand the fundamental mechanism responsible for the dependence of silicon consumption on SiH4 flow rate.