• 제목/요약/키워드: polycrystalline silicon

검색결과 344건 처리시간 0.024초

Edge Cut Process for Reducing Ni Content at Channel Edge Region in Metal Induced Lateral Crystallization Poly-Si TFTs

  • SEOK, Ki Hwan;Kim, Hyung Yoon;Park, Jae Hyo;Lee, Sol Kyu;Lee, Yong Hee;Joo, Seung Ki
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.166-171
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    • 2016
  • Nickel silicide is main issue in Polycrystalline silicon Thin Film Transistor (TFT) which is made by Metal Induced Lateral Crystallization (MILC) method. This Nickel silicide acts as a defect center, and this defect is one of the biggest reason of the high leakage current. In this research, we fabricated polycrystalline TFTs with novel method called Edge Cut (EC). With this new fabrication method, we assumed that nickel silicide at the edge of the channel region is reduced. Electrical properties are measured and trap state density also calculated using Levinson & Proano method.

Microstructural improvement in polycrystalline Si films by crystallizing with vapor transport of Al/Ni chlorides

  • Eom, Ji-Hye;Lee, Kye-Ung;Jun, Young-Kwon;Ahn, Byung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.315-318
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    • 2004
  • We developed a vapor induced crystallization (VIC) process for the first time to obtain high quality polycrystalline Si films by sublimating the mixture of $AlCl_3$ and $NiCl_2$. The VIC process enhanced the crystallization of amorphous silicon thin films. The LPCVD amorphous silicon thin films were completely crystallized after 5 hours at 480 $^{\circ}C$. It is known that needle-like grains with very small width grow in the Ni-metal induced lateral crystallization. In our new method, the width of grains is larger because the grain can also grow perpendicular to the needle growth direction. Also the interface between the merging grain boundaries was coherent. As the results, a polycrystalline film with superior microstructure has been obtained.

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스트레스에 따른 다결정 실리콘 TFT의 영향 (Characteristics of Polycrystalline Silicon TFT with Stress-Bias)

  • 백도현;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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    • pp.233-236
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    • 2000
  • Polycrystalline Silicon Thin Film Transistors(Poly-Si TFT's), fabricated at temperature lower than $600^{\circ}C$ are now largely used in many applications, particularly in large area electrons. In this work, electrical stress effects on Poly-Si TFT's fabricated by Solid Phase Crystal(SPC) was investigated by measuring electric properities such as transfer and output characteristics, and channel conductance. Consequently, It is turned out that it should be noted the output characteristics, drain current and channel conductance, strongly degrade around origin.

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3.5 inch QCIF AMOLED Panel with Ultra Low Temperature Polycrystalline Silicon Thin Film Transistor on Plastic Substrate

  • Kim, Yong-Hae;Chung, Choong-Heui;Moon, Jae-Hyun;Park, Dong-Jin;Lee, Su-Jae;Kim, Gi-Heon;Song, Yoon-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.717-720
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    • 2007
  • We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.

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Bridgman법에 의한 금속급 다결정 Si의 결정성장 및 특성평가에 관한 연구 (Crystal Growth and Characterization of Metallurgical-grade Polycrystalline Silicon by the Bridgman Method)

  • 이창원;김계수;홍준표
    • 한국주조공학회지
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    • 제14권1호
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    • pp.28-34
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    • 1994
  • Metallurgical-grade polycrystalline silicon was directionally solidified at growth rates of $0.2{\sim}1.0mm/min$ by using split type, reusable graphite molds which were coated with $Si_3N_4$ powder. The resultant grain sizes of the silicon ingots and the shapes of the solid/liquid(S/L) interfaces were investigated. X-ray diffraction was used to determine the preferred orientation in each of the silicon ingots. The impurity content of the silicon was analyzed and the resistivities of the ingots were measured. During the growth of an ingot, the shape of the S/L interface was concave to the silicon melt, and the resistivity decreased. The presence of Al which can be acting as a carrier, is thought to be the main factor causing such a decrease in resistivity. When a growth rate of 0.2㎜/min was used, the preferred orientation was found to be (111).

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금속 유도 일측면 선결정화에 의해 제작된 다채널 다결정 실리콘 박막 트랜지스터 소자 및 회로의 전기적 특성 평가 (Dynamic Characteristics of Multi-Channel Metal-Induced Unilaterally Precrystallized Polycrystalline Silicon Thin-Film Transistor Devices and Circuits)

  • 황욱중;강일석;임성규;김병일;양준모;안치원;홍순구
    • 한국재료학회지
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    • 제18권9호
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    • pp.507-510
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    • 2008
  • Electrical properties of multi-channel metal-induced unilaterally precrystallized polycrystalline silicon thin-film transistor (MIUP poly-Si TFT) devices and circuits were investigated. Although their structure was integrated into small area, reducing annealing process time for fuller crystallization than that of conventional crystal filtered MIUP poly-Si TFTs, the multi-channel MIUP poly-Si TFTs showed the effect of crystal filtering. The multi-channel MIUP poly-Si TFTs showed a higher carrier mobility of more than 1.5 times that of the conventional MIUP poly-Si TFTs. Moreover, PMOS inverters consisting of the multi-channel MIUP poly-Si TFTs showed high dynamic performance compared with inverters consisting of the conventional MIUP poly-Si TFTs.

다공성 금속 샤워헤드가 적용된 상압플라즈마 화학기상증착법을 이용한 저온 다결정 실리콘 증착 공정 (Low Temperature Polycrystalline Silicon Deposition by Atmospheric Pressure Plasma Enhanced CVD Using Metal Foam Showerhead)

  • 박형규;송창훈;오훈정;백승재
    • 한국전기전자재료학회논문지
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    • 제33권5호
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    • pp.344-349
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    • 2020
  • Modern thin film deposition processes require high deposition rates, low costs, and high-quality films. Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) meets these requirements. AP-PECVD causes little damage on thin film deposition surfaces compared to conventional PECVD. Moreover, a higher deposition rate is expected due to the surface heating effect of atomic hydrogens in AP-PECVD. In this study, polycrystalline silicon thin film was deposited at a low temperature of 100℃ and then AP-PECVD experiments were performed with various plasma powers and hydrogen gas flow rates. A deposition rate of 15.2 nm/s was obtained at the VHF power of 400 W. In addition, a metal foam showerhead was employed for uniform gas supply, which provided a significant improvement in the thickness uniformity.

나노급 두께 니켈실리사이드의 적외선 흡수 특성 (IR Absorption Property in Nano-thick Nickel Silicides)

  • 윤기정;한정조;송오성
    • 한국재료학회지
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    • 제17권6호
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    • pp.323-330
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    • 2007
  • We fabricated thermaly evaporated 10 nmNi/(poly)Si films to investigate the energy saving property of silicides formed by rapid thermal annealing (RTA) at the temperature of $300{\sim}1200^{\circ}C$ for 40 seconds. Moreover, we fabricated $10{\sim}50$ nm-thick ITO/Si films with a rf-sputter as reference films. A four-point tester was used to investigate the sheet resistance. A transmission electron microscope (TEM) and an X-ray diffractometer were used for the determination of cross sectional microstructure and phase changes. A UV-VISNIR and FT-IR (Fourier transform infrared rays spectroscopy) were employed for near-IR and middle-IR absorbance. Through TEM analysis, we confirmed $20{\sim}70nm-thick$ silicide layers formed on the single and polycrystalline silicon substrates. Nickel silicides and ITO films on the single silicon substrates showed almost similar absorbance in near-IR region, while nickel silicides on polycrystalline silicon substrate showed superior absorbance above 850 nm near-IR region to ITO films. Nickel silicide on polycrystalline substrate also showed better absorbance in middle IR region than ITO. Our result implies that nano-thick nickel silicides may have exellent absorbing capacity in near-IR and middle-IR region.

다결정 다공질 실리콘 나노구조의 전계 방출 특성 (Field Emission properties of Porous Polycrystalline silicon Nano-Structure)

  • 이주원;김훈;박종원;이윤희;장진;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.69-72
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    • 2002
  • We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^{2}$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

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Electrical properties of the Porous polycrystalline silicon Nano-Structure as a cold cathode field emitter

  • Lee, Joo-Won;Kim, Hoon;Lee, Yun-Hi;Jang, Jin;Oh, Myung-Hwan;Ju, Byung-Kwon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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    • pp.1035-1038
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    • 2002
  • The electrical properties of Porous polycrystalline silicon Nano-Structure (PNS) as a cold cathode were investigated as a function of anodizing condition, the thickness of Au film as a top electrode and the substrate temperature. Non-doped 2${\mu}m$-polycrystalline silicon was electrochemically anodized in HF: ethanol (=1:1) mixture as a function of the anodizing condition including a current density and anodizing time. After anodizing, the PNS was thermally oxidized for 1 hr at 900 $^{\circ}C$. Then, 20nm, 30nm, 45nm thickness of Au films as a top electrode were deposited by E-beam evaporator. Among the PNSs fabricated under the various kinds of anodizing conditions, the PNS anodized at a current density of 10mA/$cm^2$ for 20 sec has the lowest turn-on voltage and the highest emission current than those of others. Also, the electron emission properties were investigated as functions of measuring temperature and the different thickness of Au film as a top-electrode.

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