• 대한금속재료학회지
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• 제46권2호
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• pp.88-96
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• 2008

Thermal evaporated 10 nm-$Ni_{50}Co_{50}$/(70 nm-poly)Si films were deposited to examine the energy saving properties of silicides formed by rapid thermal annealing at temperature ranging from 500 to $1,100^{\circ}C$ for 40 seconds. Thermal evaporated 10 nm-Ni/(70 nm-poly)Si films were also deposited as a reference using the same method for depositing the 10 nm-$Ni_{50}Co_{50}$/(70 nm-poly)Si films. A four-point probe was used to examine the sheet resistance. Transmission electron microscopy (TEM) and X-ray diffraction XRD were used to determine cross sectional microstructure and phase changes, respectively. UV-VIS-NIR and FT-IR (Fourier transform infrared spectroscopy) were used to examine the near-infrared (NIR) and middle-infrared (MIR) absorbance. TEM analysis confirmed that the uniform nickel-cobalt composite silicide layers approximately 21 to 55 nm in thickness had formed on the single and polycrystalline silicon substrates as well as on the 25 to 100 nm thick nickel silicide layers. In particular, nickel-cobalt composite silicides showed a low sheet resistance, even after rapid annealing at $1,100^{\circ}C$. Nickel-cobalt composite silicide and nickel silicide films on the single silicon substrates showed similar absorbance in the near-IR region, while those on the polycrystalline silicon substrates showed excellent absorbance until the 1,750 nm region. Silicides on polycrystalline substrates showed high absorbance in the middle IR region. Nickel-cobalt composite silicides on the poly-Si substrates annealed at $1,000^{\circ}C$ superior IR absorption on both NIR and MIR region. These results suggest that the newly proposed $Ni_{50}Co_{50}$ composite silicides may be suitable for applications of IR absorption coatings.

• 한국재료학회지
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• 제16권10호
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• pp.656-662
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• 2006

We fabricated thermal evaporated 10 nm-$Ni_xCo_{1-x}$ (x=0.2, 0.5 and 0.8) /(poly)Si films to form nanothick cobalt nickel composite silicides by a rapid thermal annealing at $700{\sim}1100^{\circ}C$ for 40 seconds. A field emission scanning electron microscope and a micro-Raman spectrometer were employed for microstructure and silicon residual stress characterization, respectively. We observed self-aligned micro-pinholes on single crystal silicon substrates silicidized at $1100^{\circ}C$. Raman silicon peak shift indicates that the residual tensile strain of $10^{-3}$ in single crystal silicon substrates existed after the silicide process. We propose thermal stress from silicide exothermic reaction and high temperature silicidation annealing may cause the pinholes. Those pinholes are expected to be avoided by lowering the silicidation temperature. Our results imply that we may use our newly proposed composite silicides to induce the appropriate strained layer in silicion substrates.

• 반도체디스플레이기술학회지
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• 제4권2호
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• pp.7-10
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• 2005

[ $SiO_{2}$ ] or SiON is usually deposited and annealed after formation of silicide in real transistor fabrication processes. Nickel silicide and nickel silicide with Co interlayer were annealed at 650$^{\circ}C$ for 30 min with silica top layer in this study to investigate its thermal stability. SEM, XPS, and FPP(four point probe) were employed for the investigation. Nickel silicide with Co interlayer showed improved thermal stability. Co interlayer seems to play a key role to the stability of nickel silicide.

• 한국전기전자재료학회논문지
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• 제20권4호
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• pp.308-317
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• 2007

We fabricated thermally-evaporated 10 nm-Ni/(poly)Si and 10 nm-$Ni_{0.5}Co_{0.5}$/(Poly)Si structures to investigate the microstructure of nickel silicides at the elevated temperatures required lot annealing. Silicides underwent rapid annealing at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profilescope were employed for the determination of vortical microstructure and thickness. Nickel silicides with cobalt on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1100^{\circ}C$ and $900^{\circ}C$, respectively, while the conventional nickle monosilicide showed low resistance below $700^{\circ}C$. Through TEM analysis, we confirmed that a uniform, $10{\sim}15 nm$-thick silicide layer formed on the single-crystal silicon substrate for the Co-alloyed case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo-alloy composite silicide process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• 한국산학기술학회논문지
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• 제8권2호
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• pp.195-200
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• 2007

최소선폭 $0.1{\mu}m$ 이하의 살리사이드 공정을 상정하여 $10nm-Ni_{0.5}Co_{0.5}/70\;nm-Poly-Si/200\;nm-SiO_2$ 구조로부터 쾌속 열처리를 이용해서 실리사이드 온도를 $600{\sim}1100^{\circ}C$까지 변화시키면서 복합실리사이드를 제조하고 이들의 면저항의 변화와 미세구조의 변화를 면저항 측정기와 TEM 수직단면, 오제이 두께 분석으로 확인하였다. 기존의 동일한 공정으로 제조된 니켈실리사이드에 비해 제안된 니켈 코발트 복합실리사이드는 $900^{\circ}C$까지 저저항을 유지시킬 수 있는 장점이 있었고 20nm 두께의 균일한 실리사이드 층을 폴리실리콘 상부에 형성시킬 수 있었다. 고온 처리시에는 복합실리사이드와 실리콘의 전기적으로 상분리되는 혼합현상으로 고저항 특성이 나타나는 문제를 확인하였다. 제안된 NiCo 합금 박막을 70nm 높이의 폴리실리콘 게이트를 가진 디바이스에 $900^{\circ}C$이하의 실리사이드화 온도에서 효과적으로 산리사이드 공정의 적용이 기대되었다.

• 한국재료학회지
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• 제17권2호
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• pp.73-80
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• 2007

For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.

• 한국표면공학회지
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• 제38권3호
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• pp.89-94
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• 2005

We investigate the reaction stability of cobalt and nickel with side-wall materials of $SiO_2\;and\;Si_3N_4$. We deposited 15nm-Co and 15nm-Ni on $SiO_2(200nm)/p-type$ Si(100) and $Si_3N_4(70 nm)/p-type$ Si(100). The samples were annealed at the temperatures of $700\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The sheet resistance, shape, and composition of the residual materials were investigated with a 4-points probe, a field emission scanning electron microscopy, and an AES depth profiling, respectively. Samples of annealed above $1000^{\circ}C$ showed the agglomeration of residual metals with maze shape and revealed extremely high sheet resistance. The Auger depth profiling showed that the $SiO_2$ substrates had no residual metallic scums after $H_2SO_4$ cleaning while $Si_3N_4$ substrates showed some metallic residuals. Therefore, the $SiO_2$ spacer may be appropriate than $Si_3N_4$ for newly proposed Co/Ni composite salicide process.

• 한국재료학회지
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• 제14권12호
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• pp.846-850
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• 2004

NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.

• 한국재료학회지
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• 제14권6호
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• pp.389-393
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• 2004

The silicide layer used as a diffusion barrier in microelectronics is typically required to be below 50 nm-thick and, the same time, the silicides also need to have low contact resistance without agglomeration at high processing temperatures. We fabricated Si(100)/15 nm-Ni/15 nm-Co samples with a thermal evaporator, and annealed the samples for 40 seconds at temperatures ranging from $700^{\circ}C$ to $1100^{\circ}C$ using rapid thermal annealing. We investigated microstructural and compositional changes during annealing using transmission electron microscopy and auger electron spectroscopy. Sheet resistance of the annealed sample stack was measured with a four point probe. The sheet resistance measurements for our proposed Co/Ni composite silicide was below 8 $\Omega$/sq. even after annealing $1100^{\circ}C$, while conventional nickel-monosilicide showed abrupt phase transformation at $700^{\circ}C$. Microstructure and auger depth profiling showed that the silicides in our sample consisted of intermixed phases of $CoNiSi_{x}$ and NiSi. It was noticed that NiSi grew rapidly at the silicon interface with increasing annealing temperature without transforming into $NiSi_2$. Our results imply that Co/Ni composite silicide should have excellent high temperature stability even in post-silicidation processes.

• 한국산학기술학회논문지
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• 제7권3호
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• pp.332-337
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• 2006

기판전면에 패턴 없이 15 nm Co/15 nm Ni/70 nm polysilicon/200 nm $SiO_2$/Si(100) 구조로 적층된 구조로부터 급속열처리기 (rapid thermal annealer : RTA)를 이용하여 40초간 700, 900, $1000^{\circ}C$의 실리사이드화 온도를 변화시키면서 CoNi 복합실리사이드를 형성하였다. 완성된 두께 100 nm 정도의 CoNi 복합실리사이드층으로 배선층을 만든다고 상정하여, 이중 집속이온빔(dual beam focused ion beam : FIB)을 써서 30 kV에서 표면전류를 $1{\sim}100$ pA 범위에서 조절하면서 나노급 선폭제작의 가능성을 확인하였다. 각 온도별 복합실리사이드에 동일한 이온빔 조건으로 $100{\mu}m$ 길이의 패턴을 만들고, 이온빔으로 양 끝단에 트렌치를 만들어 FE-SEM으로 각 조건에서의 선폭, 두께, 최종 에칭형상을 확인하였다. 기존 형상변형이 많아서 나노급 선폭 구현이 불리한 폴리사이드 공정에 비해서, 최초로 새로운 저저항 복합실리사이드에 대해서 100 nm 이하의 나노급 피치를 가진 선폭 제작이 $30kV{\sim}30pA$ 범위에서 가능하였다.