• Journal of Advanced Marine Engineering and Technology
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• v.20 no.4
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• pp.90-100
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• 1996

To maintain high spacial accuracy and rapid CPU time in interpolating data from grid to random position or inversely in PIV, proposed many technuques are compared and discussed mainly in terms of interpolating error and computing time. And artificial PIV atmosphere data is furnished by CFD result. First, for interpolation from grid to random position, multiquadric method gives the highest accuracy with the longest CPU time and Taylor series expansion methods give reasonable accuracy with less calculating load. Secondly, the sub-pixel resolution analysis in estimating the coordinates of the maximum correlation coefficients essential in the grey level correlation PIV reveal that 8-neighbours 2nd-order least square interpolation gives utmost accuracy in terms of the real flow conditions.

• Journal of Advanced Marine Engineering and Technology
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• v.20 no.4
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• pp.412-412
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• 1996

To maintain high spacial accuracy and rapid CPU time in interpolating data from grid to random position or inversely in PIV, proposed many technuques are compared and discussed mainly in terms of interpolating error and computing time. And artificial PIV atmosphere data is furnished by CFD result. First, for interpolation from grid to random position, multiquadric method gives the highest accuracy with the longest CPU time and Taylor series expansion methods give reasonable accuracy with less calculating load. Secondly, the sub-pixel resolution analysis in estimating the coordinates of the maximum correlation coefficients essential in the grey level correlation PIV reveal that 8-neighbours 2nd-order least square interpolation gives utmost accuracy in terms of the real flow conditions.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.949-952
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• 2000

A low power 10bit current-mode folding and interpolating CMOS analog to digital converter (ADC) with arithmetic folding blocks is presented in this paper. A current-mode two-level folding amplifier with a high folding rate (FR) is designed not only to prevent ADC from increasing a FR excessively, but also to perform a high resolution at a single power supply of 3.3V The proposed ADC is implemented by a 0.6${\mu}$m n-well CMOS single poly/double metal process. The simulation result shows a differential nonlinearity (DNL) of ${\pm}$0.5LSB, an integral nonlinearity (INL) of ${\pm}$1.0LSB

• Journal of Korean Institute of Industrial Engineers
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• v.21 no.4
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• pp.529-540
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• 1995

The paper deals with a procedure for constructing a composite surface interpolating a polygonal curve mesh defined from 3D scattered points. The procedure consists of a poly-angulation, construction of a curve net, and interpolation of the curve net. The poly-angulation contains a stage that changes a triangular edge net obtained from a triangulation into a poly-angular edge net. A curve net is constructed by replacing edges on the edge net with cubic Bezier curves. Finally, inside of an n-sided polygon is interpolated by n subdivided triangular subpatches. The method interpolates given point data with relatively few triangular subpatches. For an n-sided polygon, our method constructs an interpolant with n subdivided triangular subpatches while the existing triangular surface modeling needs 3(n-2) subpatches. The obtained surface is composed of quartic triangular patches which are $G^1$-continuous to adjacent patches.

• Korean Journal of Hydrosciences
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• v.5
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• pp.85-97
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• 1994

A hybrid finite difference method for the longitudinal dispersion equation, which is based on combining the Holly-Preissmann scheme with fifth-degree Hermite interpolating polynomial and the generalized Crank-Nicholson scheme, is described and comparatively evaluated with other characteristics-based numerical methods. Longitudinal dispersion of an instantaneously-loaded pollutant source is simulated, and computational results are compared with the exact solution. The present method is free from wiggles regardless of the Courant number, and exactly reproduces the location of the peak concentration. Overall accuracy of the computation increases for smaller value of the weighting factor, $\theta$of the model. Larger values of $\theta$ overestimates the peak concentration. Smaller Courant number yields better accuracy, in general, but the sensitivity is very low, especially when the value of $\theta$ is small. From comparisons with the hybrid method using cubic interpolating polynomial and with splitoperator methods, the present method shows the best performance in reproducing the exact solution as the advection becomes more dominant.

• Bulletin of the Korean Mathematical Society
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• v.58 no.4
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• pp.909-914
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• 2021

In this short note we prove new differential Harnack inequalities interpolating those for the static surface and for the Ricci flow. In particular, for 0 ≤ 𝜀 ≤ 1, α ≥ 0, 𝛽 ≥ 0, 𝛾 ≤ 1 and u being a positive solution to $${\frac{{\partial}u}{{\partial}t}}={\Delta}u-{\alpha}u\;{\log}\;u+{\varepsilon}Ru+{\beta}u^{\gamma}$$ on closed surfaces under the flow ${\frac{\partial}{{\partial}t}}g_{ij}=-{\varepsilon}Rg_{ij}$ with R > 0, we prove that $${\frac{\partial}{{\partial}t}}{\log}\;u-{\mid}{\nabla}\;{\log}\;u{\mid}^2+{\alpha}\;{\log}\;u-{\beta}u^{{\gamma}-1}+\frac{1}{t}={\Delta}\;{\log}\;u+{\varepsilon}R+{\frac{1}{t}{}\geq}0$$.

• Journal of Ship and Ocean Technology
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• v.10 no.2
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• pp.24-36
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• 2006

Ship hullform is usually designed with a curve network, and smooth hullform surfaces are supposed to be generated by filling in (or interpolating) the curve network with appropriate surface patches. Tensor-product surfaces such as B-spline and $B\'{e}zier$ patches are typical representations to this interpolating problem. However, they have difficulties in representing the surfaces of irregular topological type which are frequently appeared in the fore- and after-body of ship hullform curve network. In this paper, we proposed a method that can automatically generate discrete $G^1$ continuous B-spline surfaces interpolating given curve network of ship hullform. This method consists of three steps. In the first step, given curve network is reorganized to be of two types: boundary curves and reference curves of surface patches. Especially, the boundary curves are specified for their surface patches to be rectangular or triangular topological type that can be represented with tensor-product (or degenerate) B-spline surface patches. In the second step, surface fitting points and cross boundary derivatives are estimated by constructing virtual iso-parametric curves at discrete parameters. In the last step, discrete $G^1$ continuous B-spline surfaces are generated by surface fitting algorithm. Finally, several examples of resulting smooth hullform surfaces generated from the curve network data of actual ship hullform are included to demonstrate the quality of the proposed method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1442-1447
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• 2004

In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.826-832
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• 2004

A CMOS 8 bit folding and interpolating ADC for an embedded system inside VLSI is presented in this paper. This folding ADC uses the 2 stage architecture for improving of nonlinearity. repeating the folding and interpolating twice. At a proposed structure, a transistor differential pair operates on the second folder. A ADC with 2 stage architecture reduces the number of comparators and resisters. So it is possible to provide small chip size, low power consumption and high operating speed. The design technology is based on fully standard 0.25m double-Poly 2 metal n-well CMOS Process. The simulated Power consumption is 45mW with an applied voltage of 2.5V and sampling frequency of 250MHz. The INL and DNL are within <ㅆㄸㅌ>$\pm$0.2LSB, respectively. The SNDR is approximately 45dB for input frequency of 10MHz.

• Bulletin of the Korean Mathematical Society
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• v.41 no.2
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• pp.319-326
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• 2004

In this article, we investigate invertible interpolation problems in Alg(equation omitted) : Let(equation omitted) be a subspace lattice on a Hilbert space H and let X and Y be operators acting on H. When does there exist an invertible operator A in Alg(equation omitted) such that AX = Y?