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A 500MSamples/s 6-Bit CMOS Folding and Interpolating AD Converter  

Lee Don-Suep (두원공과대학 소프트웨어개발과)
Kwack Kae-Dal (한양대학교 전자전기컴퓨터공학부)
Abstract
In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.
Keywords
ADC;
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1 Bram Nauta and Ardie G. W. Venes, 'A70-MS/s 110-mW 8-b CMOS Folding andInterpolating A/D Converter/' IEEE J. ofSolid-State Circuits, vol.SO, no.12, pp.1302-1308, Dec. 1995
2 Iuri Mehr and Declan Dalton, 'A500-MSamples/s, 6-Bit Nyquist-Rate ADCfor Disk-Drive Read-Channel Applications,'IEEE J. of Solid-Stat Circuits, vo1.34, no.7,pp. 912-919, July. 1999   DOI   ScienceOn
3 Rob E. J. Van de Grift and Rudy J. Van dePlassche, 'A Monolithic 8-Bit Video A/DConverter,' IEEE J. of Solid-State Circuits,vol. sc-19, no. 3, pp 376-377, June. 1984
4 Johan van Valburg and Rudy J. van dePlassche, 'An 8-b 650-MHz Folding ADC',IEEE J. of Solid-State Circuits,' vo1.27,no.12, pp. 1662-1666, Dec. 1992   DOI   ScienceOn
5 P.Vorenkamp, R. Roovers, 'A 12b 50MSamples/s Cascaded Folding andInterpolating ADC,' ISSCC97 Session8,pp.134-135,442, 1997
6 Michael P. Flynn and Ben Sheahan,'400-Msamp1e/s, 6-b CMOS Folding andInterpolating ADC,' IEEE J. of Solid-StatCircuits, vo1.33, no.12, pp. 1932-1938, Dec.1998   DOI   ScienceOn
7 ROB E.J. Van de Grift, Ivo W.J.M. Rutten,and Martien Van der Veen, 'An 8-bit VideoADC Incorporating Folding andInterpolation Techniques,' IEEE J. ofSolid-State Circuits, vol. sc-22, no. 6, pp994-953, Dec. 1987
8 Ardie G.W. Venes, and Rudy J. van dePlassche, 'An 80-MHz, 80-mW, 8-b CMOSFolding A/D Converter with DistributedTrack-and-Hold Processing,' IEEE J. ofSolid-State Circuits, vol. 31, no. 12, pp.1846-1853, Dec. 1996   DOI   ScienceOn