• Title/Summary/Keyword: fully-differential 회로

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Development of a Voltage Measuring System for the Pusan-Hamada Submarine Cable (부산 - 병전간 해저케이블 전압측정 장치의 개발)

  • Bahk, Kyung-Soo
    • Journal of Korean Society of Coastal and Ocean Engineers
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    • v.3 no.4
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    • pp.255-260
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    • 1991
  • A voltage measuring system specified for the voltage fluctuation of the Pusan-Hamada submarine cable is developed by adding circuits of differential amplification and analog-to-digital conversion to a microprocessor-based data logger with a data modem. This system is charaterized by its small size. no power failure. fully unmanned operation. and precise instrumental drift correction. In addition to the cable voltage and current it measures an ambient temperature and a mercury cell voltage in order to calibrate temperature effect and check its long-term stability. The data acquired by this system show that the voltage signal. comprising fast random noises with a constant width of about 0.2V. fluctuates within a range of about 1V and the fluctuation frequency is similar to that of tidal motion. The source voltage of power feeding equipment (PFE) for the cable system seems to be affected when the room temperature changes rapidly.

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A 250MS/s 8 Bit CMOS folding and Interpolating AD Converter with 2 Stage Architecture (2단 구조를 사용한 250MS/s 8비트 CMOS 폴딩-인터폴레이팅 AD 변환기)

  • 이돈섭;곽계달
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.4
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    • pp.826-832
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    • 2004
  • A CMOS 8 bit folding and interpolating ADC for an embedded system inside VLSI is presented in this paper. This folding ADC uses the 2 stage architecture for improving of nonlinearity. repeating the folding and interpolating twice. At a proposed structure, a transistor differential pair operates on the second folder. A ADC with 2 stage architecture reduces the number of comparators and resisters. So it is possible to provide small chip size, low power consumption and high operating speed. The design technology is based on fully standard 0.25m double-Poly 2 metal n-well CMOS Process. The simulated Power consumption is 45mW with an applied voltage of 2.5V and sampling frequency of 250MHz. The INL and DNL are within <ㅆㄸㅌ>$\pm$0.2LSB, respectively. The SNDR is approximately 45dB for input frequency of 10MHz.

A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

A 0.16㎟ 12b 30MS/s 0.18um CMOS SAR ADC Based on Low-Power Composite Switching (저전력 복합 스위칭 기반의 0.16㎟ 12b 30MS/s 0.18um CMOS SAR ADC)

  • Shin, Hee-Wook;Jeong, Jong-Min;An, Tai-Ji;Park, Jun-Sang;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.27-38
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    • 2016
  • This work proposes a 12b 30MS/s 0.18um CMOS SAR ADC based on low-power composite switching with an active die area of $0.16mm^2$. The proposed composite switching employs the conventional $V_{CM}$-based switching and monotonic switching sequences while minimizing the switching power consumption of a DAC and the dynamic offset to constrain a linearity of the SAR ADC. Two equally-divided capacitors topology and the reference scaling are employed to implement the $V_{CM}$-based switching effectively and match an input signal range with a reference voltage range in the proposed C-R hybrid DAC. The techniques also simplify the overall circuits and reduce the total number of unit capacitors up to 64 in the fully differential version of the prototype 12b ADC. Meanwhile, the SAR logic block of the proposed SAR ADC employs a simple latch-type register rather than a D flip-flop-based register not only to improve the speed and stability of the SAR operation but also to reduce the area and power consumption by driving reference switches in the DAC directly without any decoder. The measured DNL and INL of the prototype ADC in a 0.18um CMOS are within 0.85LSB and 2.53LSB, respectively. The ADC shows a maximum SNDR of a 59.33dB and a maximum SFDR of 69.83dB at 30MS/s. The ADC consumes 2.25mW at a 1.8V supply voltage.

One-Pot Reaction Involving Two Different Amines and Formaldehyde Leading to the Formation of Poly(Macrocyclic) Cu(II) Complexes

  • Lee, Yun-Taek;Kang, Shin-Geol
    • Bulletin of the Korean Chemical Society
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    • v.33 no.8
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    • pp.2517-2522
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    • 2012
  • New polynuclear poly(hexaaza macrocyclic) copper(II) complexes $[1](ClO_4)_{2n}{\cdot}(H_2O)_{2n}$, $[2](ClO_4)_{2n}{\cdot}(H_2O)_{2n}$, and $[3](ClO_4)_{2n}{\cdot}(H_2O)_{2n}$ have been prepared by the one-pot reaction of formaldehyde with ethylenediamine and 1,2-bis(2-aminoethoxy)ethane, 1,3-diaminopropane, or 1,6-diaminohexane in the presence of the metal ion. The polymer complexes contain fully saturated 14-membered hexaaza macrocyclic units (1,3,6,8,10,13-hexaazacyclotetradecane) that are linked by $N-(CH_2)_2-O-(CH_2)_2-O-(CH_2)_2-N$, $N-(CH_2)_3-N$, or $N-(CH_2)_6-N$ chains. The mononuclear complex $[Cu(H_2L^5)](ClO_4)_4$ ($H_2L^5$ = a protonated form of $L^5$) bearing two $N-(CH_2)_2-O-(CH_2)_2-O-(CH_2)_2-NH_2$ pendant arms has also been prepared by the metal-directed reaction of ethylenediamine, 1,2-bis(2-aminoethoxy)ethane, and formaldehyde. The polymer complexes were characterized employing elemental analyses, FT-IR and electronic absorption spectra, molar conductance, X-ray diffraction (XRD), thermogravimetric analysis (TGA), differential scanning calorimetry (DSC), and scanning electron micrograph (SEM). Electronic absorption spectra of the complexes show that each macrocyclic unit of them has square-planar coordination geometry with a 5-6-5-6 chelate ring sequence. The polymer complexes as well as $[Cu(H_2L^5)]^{4+}$ are quite stable even in concentrated $HClO_4$ solutions. Synthesis and characterization of the polynuclear and mononuclear copper(II) complexes are reported.

Multichannel Transimpedance Amplifier Away in a $0.35\mu m$ CMOS Technology for Optical Communication Applications (광통신용 다채널 CMOS 차동 전치증폭기 어레이)

  • Heo Tae-Kwan;Cho Sang-Bock;Park Min Park
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.8 s.338
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    • pp.53-60
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    • 2005
  • Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.

Full CMOS PLC SoC ASIC with Integrated AFE (Analog Frond-End 내장형 전력선 통신용 CMOS SoC ASIC)

  • Nam, Chul;Pu, Young-Gun;Park, Joon-Sung;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.10
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    • pp.31-39
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    • 2009
  • This paper presents the single supply power line communication(PLC) SoC ASIC with built-in analog frond-end circuit. To achieve the low power consumption along with low chip cost, this PLC SoC ASIC employs fully CMOS analog front-end(AFE) and several built-in Regulators(LDOs) powering for Core logic, ADC, DAC and IP Pad driver. The AFE includes RX of pre-amplifier, Programmable gain amplifier and 10 bit ADC and TX of 10bit Digital Analog Converter and Line driver. This PLC Soc was implemented with 0.18um 1 Poly 5 Metal CMOS process. The single power supply of 3.3V is required for the internal LDOs. The total power consumption is below 30mA at standby and 300mA at active which meets the eco-design requirement. The chips size is $3.686\;{\times}\;2.633\;mm^2$.

A Design of Temperature-Compensating Ethernet Equalizer for Reliable Automotive Sensor Communication (차량 내 신뢰성 있는 센서 (Sensor) 통신을 위한 온도보상 기반 이더넷 이퀄라이저 (Ethernet equalizer) 설계)

  • Seo, Seoktae;Bien, Franklin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.7
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    • pp.61-70
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    • 2017
  • In this paper, an Ethernet equalizer that compensates for automotive temperature variations within a broad range is presented. Communications in automotive systems have become increasingly important because of the many electronics in vehicles. Ethernet protocols are a good candidate for automotive communications. However, they should satisfy the AEC-Q100 requirements that stipulate an operational temperature range from -40 to $150^{\circ}C$. This paper proposes an Ethernet equalizer that can recover data up until 100 m length of CAT-5 cable adaptively within a temperature range of -40 to $150^{\circ}C$. To support the wide temperature range, a feedback system is used. The proposed equalizer has a bandwidth of 31.25 MHz with a fully-differential structure and is implemented in a Hynix $0.13{\mu}m$ BCDMOS technology.

Effects of histamine and antihistamine on the hard tick Haemaphysalis longicornis during blood sucking

  • Mohammad Saiful Islam;Abul Fatah Shah Muhammad Talha;Myung-Jo You
    • Parasites, Hosts and Diseases
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    • v.61 no.2
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    • pp.172-182
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    • 2023
  • At the time of host attachment, ticks are very sensitive to histamine, but during rapid blood sucking they paradoxically require histamine. Using a rabbit model, we studied the effects of histamine and antihistamine during attachment and fast-feeding in different life stages of Haemaphysalis longicorns. We examined how they responded to histamine and antihistamine by analyzing the detachment rate, histology of feeding lesions, and post-feeding behavior. A significant difference (P<0.01) was found in the detachment rate between experimental and control treatments throughout the observation period. Ticks exhibited a higher detachment rate (30.1%) at 12 h after histamine application during attachment time and on antihistamine-treated skin (25.4%) at 96 h during fast-feeding. After feeding on histamine-treated rabbits, the fully engorged body weights of larvae and nymphs were 0.7±0.36 mg and 3.5±0.65 mg, respectively. An average increase in body weight of 0.6±0.05 mg and 3.2±0.30 mg was observed for larvae and nymphs compared to the respective control weights. Nymphs and adults engorged after antihistamine treatment had an average body weight of 1.3±0.54 mg and 54±0.81 mg, respectively. An average decrease in body weight was observed in antihistamine-treated H. longicornis compared with control nymphs (3.3±0.42 mg) and adults (174±1.78 mg). Skin biopsies were collected after treatment, and differential histopathological characteristics were found between the treatment and control groups. Tick-infested skin collected from rabbits in the antihistamine-treated group lacked erythrocytes in the feeding pool, indicating that antihistamine impaired tick fast-feeding stage.

Differential Expression of Gangliosides in the Ovary and Uterus of Streptozotocin-Induced and db/db Diabetic Mice

  • Kim, Sung-Min;Kwak, Dong-Hoon;Kim, Sun-Mi;Jung, Ji-Ung;Lee, Dae-Hoon;Lee, Seoul;Jung, Kyu-Yong;Do, Su-Il;Choo, Young-Kug
    • Archives of Pharmacal Research
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    • v.29 no.8
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    • pp.666-676
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    • 2006
  • Gangliosides are widely distributed in mammalian cells and play important roles in various functions such as cell differentiation and growth control. In addition, diabetes and obesity cause abnormal development of reproductive processes in a variety of species. However, the mechanisms underlying these effects, and how they are related, are not fully understood. This study examined whether the differential expression of gangliosides is implicated in the abnormal follicular development and uterine architecture of streptozotocin (STZ)-induced and db/db diabetic mice. Based upon the mobility on high-performance thin-layer chromatography, mouse ovary consisted of at least five different ganglioside components, mainly gangliosides GM3, GM1, GD1a and GT1b, and diabetic ovary exhibited a significant reduction in ganglioside expression with apparent changes in the major gangliosides. A prominent immunofluorescence microscopy showed a dramatic loss of ganglioside GD1a expression in the primary, secondary and Graafian follicles of STZ-induced and db/db diabetic mice. A significant decrease in ganglioside GD3 expression was also observed in the ovary of db/db mice. In the uterus of STZ-induced diabetic mice, expression of gangliosides GD1a and GT1b was obviously reduced, but gangliosides GM1, GM2 and GD3 expression was increased. In contrast, the uterus of db/db mice showed a significant increase in gangliosides GM1, GD1a and GD3 expression. Taken together, a complex pattern of ganglioside expression was seen in the ovary and uterus of normoglycemic ICR and $db/^+$ mice, and the correspoding tissues in diabetic mice are characterized by appreciable changes of the major ganglioside expression. These results suggest that alterations in ganglioside expression caused by diabetes mellitus may be implicated in abnormal ovarian development and uterine structure.