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Full CMOS PLC SoC ASIC with Integrated AFE  

Nam, Chul (Department of Electronic Engineering, Konkuk University)
Pu, Young-Gun (Department of Electronic Engineering, Konkuk University)
Park, Joon-Sung (Department of Electronic Engineering, Konkuk University)
Hur, Jeong (Department of Electronic Engineering, Konkuk University)
Lee, Kang-Yoon (Department of Electronic Engineering, Konkuk University)
Publication Information
Abstract
This paper presents the single supply power line communication(PLC) SoC ASIC with built-in analog frond-end circuit. To achieve the low power consumption along with low chip cost, this PLC SoC ASIC employs fully CMOS analog front-end(AFE) and several built-in Regulators(LDOs) powering for Core logic, ADC, DAC and IP Pad driver. The AFE includes RX of pre-amplifier, Programmable gain amplifier and 10 bit ADC and TX of 10bit Digital Analog Converter and Line driver. This PLC Soc was implemented with 0.18um 1 Poly 5 Metal CMOS process. The single power supply of 3.3V is required for the internal LDOs. The total power consumption is below 30mA at standby and 300mA at active which meets the eco-design requirement. The chips size is $3.686\;{\times}\;2.633\;mm^2$.
Keywords
PLC; Full-CMOS; LDO; Analog front-End(AFE); Eco Design;
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