• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1226-1227
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• 2008

In this study, a single p-type Si nanowire - Au nanoparticles nano floating gate memory (NFGM) device is successfully fabricated and characterized their memory effects by comparison of electrical characteristics of p-type Si nanowire-based field effect transistor (FET) devices with Au nanoparticles embedded in the $Al_2O_3$ gate materials and without the Au nanoparticles. Drain current versus gate voltage ($I_{DS}-V_{GS}$) characteristics of a single p-type Si nanowire - Au nanoparticle NFGM device show counterclockwise hysteresis loops with the threshold voltage shift of ${\Delta}V_{th}$= 3.0 V. However, p-type Si nanowire based top-gate device without Au nanoparticles does not exhibit a threshold voltage shift. This behavior is ascribed to the presence of the Au nanoparticles, and is indicative of the trapping and emission of electrons in the Au nanoparticles.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.8
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• pp.5213-5218
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• 2014

Organic memory devices were made using the plasma polymerization method. The memory device consisted of ppMMA(plasma polymerization MMA) thin films as the tunneling and insulating layer, and a Au thin film as the memory layer, which was deposited by thermal evaporation. The organic memory operation theory was developed according to the charging and discharging characteristics of floating gate type memory, which would be measured by the hysteresis voltage and memory voltage with the gate voltage values. The I-V characteristics of the fabricated memory device showed a hysteresis voltage of 26 [V] at 60 ~ -60 [V] double sweep measuring conditions. The programming voltage was applied to the gate electrode in accordance with the result of this theory. A programming voltage of 60[V] equated to a memory voltage of 13[V], and 80[V] equated to a memory voltage of 18[V]. The memory voltage of approximately 40 [%]increased with increasing programming voltage. The charge memory layer charging or discharging according to the theory of the memory was verified experimentally.

• Journal of Electrical Engineering and information Science
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• v.2 no.3
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• pp.132-138
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• 1997

Electrical characteristics of split-gate flash EEPROM with triple polysilicon is investigated in terms of effects of floating gate and offset gate. In order to search for t the effects of offset gate on programming characteristics, threshold voltage and drain current are studied with variation of control gate voltage. The programming process is believed to depend on vertical and horizontal electric field as well as offset gate length. The erase and program threshold voltage are found to be almost constant with variation of control gate voltage above 12V, while endurance test indicates degradation of program threshold voltage. With increase of offset gate length, program threshold voltage becomes smaller and the drain source voltage just after program under constant control gate voltage becomes higher.

• Journal of IKEEE
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• v.21 no.2
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• pp.150-153
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• 2017

In this paper, a structure of GCNMOS based ESD protection circuit using floating-body technique is proposed. TCAD simulation of Synopsys was used to compare with the conventional GGNMOS and GCNMOS. Compared with the conventional GCNMOS, the proposed ESD protection circuit has lower trigger voltage and faster turn-on-time than conventional circuit because of the added NMOSFET. In the simulation result, the triggering voltage of the proposed ESD protection circuit is 4.86V and the turn-on-time is 1.47ns.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.101-105
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• 2006

Nanoscale floating-gate characteristic of colloidal Au nanoparticles electrostatically assembled on the oxidized surface of Si nanowires have been investigated. The Si nanowire split-gate transistor structure was fabricated by electron beam lithography and subsequent reactive ion etching. Colloidal Au nanoparticles with ${\sim}5$ nm diameters were selectively deposited onto the Si nanowire surface by 2 min electrophoresis. It was found that electric fields applied to the self-aligned split side gates allowed charge to be transferred on the Au nanoparticles. It was observed that the depletion mode cutoff voltage, induced by the self-aligned side gates, was shifted by more than 1 V after Au nanoparticle electrophoresis. This may be due to the semi-one dimensional nature of the narrow Si nanowire transport channel, having much enhanced sensitivity to charges on the surface.

• The Magazine of the IEIE
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• v.32 no.2 s.249
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• pp.44-52
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• 2005

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.6
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• pp.267-273
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• 2003

The plasma display panel with the electrode structure of new discharge AND gate and its driving scheme were proposed and the driving system for experiment was developed. And operation of these discharge AND gate was verified by the experiment of PDP addressing with floating electrode. This discharge AND gate operated by the operation speed of 8$mutextrm{s}$ and the operation margin of 100V. The address operation margin of 10V also obtained. It was known to be able to control the discharge of the adjoining scan electrode accurately. Because proposed method uses the DC discharge the control of the discharge can be facilitated compared with conventional discharge AND gate. Moreover, because the input discharge and the output discharge of discharge gate are separate, the display discharge can be prevented from passing discharge gates. Therefore, it is possible to apply to the large screen plasma display panel. And the decrease of contrast ratio does not occur because the scanning discharge does not influence the picture quality.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.5
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• pp.42-47
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• 2004

This research has improved the problem of discharge AND gate PDP proposed before. The polarity of the DC discharge which composes AND gate is reversely designed and the cross talk problem to the adjacent scanning electrode has been improved. The AND gate proposed before operated by using non-linearity of the discharge by the space charge. In this research, new discharge NOT logic in which it was used that an applied voltage changed with the discharge circuit was added to AND gate. AND gate came to operate more stably. A selective address was able to be discharged with four horizontal scanning electrodes from the experiment result. The operation margin of the AND gate discharge obtained 34V and of the address discharge obtained 70V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.14-15
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• 2009

Insulated Gate Bipolar Transistor(IGBTs) are widely used in power device industry. However, to improve the breakdown voltage, IGBTs are suffered from increasing on-state voltage drop due to structural design. In this paper, the new structure is proposed to solve this problem. The proposed structure has double p-floating layer inserted in n-drift layer. The p-floating layers improve the breakdown voltage compared to conventional IGBT without change of other electrical characteristics such as on-state voltage drop and threshold voltage. this is because the p-floating layers expand electric field distribution at blocking state. A electrical characteristic of proposed structure is analyzed by using simulators such as TSUPREM and MEDICI. As a result, on-state voltage drop and threshold voltage are same to a conventional TIGBT, but breakdown voltage is improved to 16%.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.545-548
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• 1998

Thin film SOI(Silicon-On-Insulator) devices exhibit floating body effect. In this paper, SOI NMOSFET is proposed to solve this problem. Some part of gate oxide was considered to be 30nm~80nm thicker than the other normal gate oxide and simulated with TSUPREM-4. The I-V characteristics were simulated with 2D MEDICI mesh. Since part of gate oxide has different oxide thickness in proposed device, the gate electric field strength is not the same throught the gate and consequently the reduction of current kink effect is occurred.