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Nanoscale Floating-Gate Characteristics of Colloidal Au Nanoparticles Electrostatically Assembled on Si Nanowire Split-Gate Transistors  

Jeon, Hyeong-Seok (Department of Nanotechnology, Hanyang University)
Park, Bong-Hyun (Department of Nanotechnology, Hanyang University)
Cho, Chi-Won (Division of Electronics and Computer Engineering, Hanyang University)
Lim, Chae-Hyun (Department of Nanotechnology, Hanyang University)
Ju, Heong-Kyu (Department of Nanotechnology, Hanyang University)
Kim, Hyun-Suk (Department of Electrical Engineering, Korea University)
Kim, Sang-Sig (Department of Electrical Engineering, Korea University)
Lee, Seung-Beck (Department of Electrical Engineering, Korea University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.6, no.2, 2006 , pp. 101-105 More about this Journal
Abstract
Nanoscale floating-gate characteristic of colloidal Au nanoparticles electrostatically assembled on the oxidized surface of Si nanowires have been investigated. The Si nanowire split-gate transistor structure was fabricated by electron beam lithography and subsequent reactive ion etching. Colloidal Au nanoparticles with ${\sim}5$ nm diameters were selectively deposited onto the Si nanowire surface by 2 min electrophoresis. It was found that electric fields applied to the self-aligned split side gates allowed charge to be transferred on the Au nanoparticles. It was observed that the depletion mode cutoff voltage, induced by the self-aligned side gates, was shifted by more than 1 V after Au nanoparticle electrophoresis. This may be due to the semi-one dimensional nature of the narrow Si nanowire transport channel, having much enhanced sensitivity to charges on the surface.
Keywords
Nanoparticle; SOI; Si nanowire; electrostatic assembly;
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