• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.51-58
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• 2013

A clock duty-cycle corrector (DCC) which is an essential device of clocking circuits for high-speed system-on-chip (SoC) design is introduced in this paper. The architectures and operation of conventional analog feedback DCCs and digital feedback DCCs are compared and analyzed. A new mixed-mode feedback DCC that combines the advantages of analog DCCs and digital DCCs to achieve a wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy is presented. Especially, the architectures and design of a mixed-mode duty-cycle amplifier (DCA) which is a core unit circuit of a mixed-mode DCC is presented in detail. Two mixed-mode DCCs based on a single-stage DCA and a two-stage DCA were designed in a 0.18-${\mu}m$ CMOS process, and it is proven that the two-stage DCA-based DCC has a wider duty-cycler correction range and smaller duty-cycle correction error.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.3
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• pp.132-139
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• 1984

This paper presents an exant analysis of the class E tuned power amplifier with a shunt inductor. The following performance parameters are determined for optimum operation with any switch duty ratio: the collector current and voltage waveforms, the peak values of collector current and voltage, the output power, the power output capability, and the values of the load network elements. The analysis shows that the maximum power output capability occurs at a duty ratio of 50 percent. The measured collector efficiency of experiments is 93 percent with 0.93W at 1MHz. This amplifier is especially applicable at portable transmitters because its colletor efficiency is extremely high.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.9-15
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• 2009

In this paper, we invented a new structure of fast ATC(Automatic Threshold Control) circuit. Using the structure we made a new burst-mode limiting amplifier with fast ATC function using commercial $0.8{\mu}m$ BiCMOS technology. It's ATC function worked so fast that even the first bit of burst-data could be detected, which confirmed that the new structure was useful for fast ATC. However, in the beginning of a burst, distortions in duty-cycle occurred and increased up to 59% of duty-cycle as amplitude of input signal increased. But we confirmed that after 10 cycles passed, duty-cycles was staying below 52% of duty-cycle for any magnitude of input signal.

• ETRI Journal
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• v.39 no.5
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• pp.737-745
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• 2017

A 6-GHz-to-18-GHz monolithic nonuniform distributed power amplifier has been designed using the load modulation of increased series gate capacitance. This amplifier was implemented using a $0.25-{\mu}m$ AlGaN/GaN HEMT process on a SiC substrate. With the proposed load modulation, we enhanced the amplifier's simulated performance by 4.8 dB in output power, and by 13.1% in power-added efficiency (PAE) at the upper limit of the bandwidth, compared with an amplifier with uniform gate coupling capacitors. Under the pulse-mode condition of a $100-{\mu}s$ pulse period and a 10% duty cycle, the fabricated power amplifier showed a saturated output power of 39.5 dBm (9 W) to 40.4 dBm (11 W) with an associated PAE of 17% to 22%, and input/output return losses of more than 10 dB within 6 GHz to 18 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.394-402
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• 2013

This paper presents design, fabrication and ruggedness test of switching-mode power amplifier using GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) for S-band radar applications. The power amplifier is designed to Class-F for high efficiency. The input signal for the measurement of the power amplifier is pulse signal at $100{\mu}s$ pulse width and duty cycle of 10 %. The measurement results of the fabricated Class-F power amplifier are a power gain of 10.8 dB, an output power of 40.8 dBm, a power added efficiency(PAE) of 54.2 %, and a drain efficiency of 62.6 %, at the center frequency. We proposed reliability test set-up of a power amplifier for ruggedness test. And we measured output power and efficiency according to VSWR(Voltage Standing Wave Ratio) variation. The designed power amplifier achieved output power of 32.6~41.1 dBm and drain efficiency of 23.4~63 % by changing VSWR, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.274-280
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• 2007

This paper demonstrates an efficiency improvement of the class E power amplifier (PA) by tuning-out the input capacitance ($C_{IN}$) of the power HBT with a shunt inductance. In order to obtain high output power, the PA needs the large emitter size of a transistor. The larger the emitter size, the higher the parasitic capacitance. The parasitic $C_{IN}$ affects the distortion of the voltage signal at the base node and changes the duty cycle to decrease the PA's efficiency. Adopting the L-C resonance, we obtain a remarkable efficiency improvement of as much as 7%. This PA exhibits output power of 29 dBm and collector efficiency of 71% at 1.9 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1239-1247
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• 2012

In this paper, design and fabrication of solid state power amplifier(SSPA) using GaN HEMT chip for X-band frequency are presented. The SSPA consists of the power supply for stable power and the control unit for communication and controlling the internal module, the RF Part to amplify RF signal, In particular the adopted active device for the RF Parts is GaN HEMT Bare chip of TriQuint company, the RF parts consists of pre-stage, drive-stage, main power-stage and each amplifier is designed with input and out matching circuit. The developed power amplifier demonstrated more than 300 W peak output power in condition of 26 % duty, max. pulse width 100us for the X-band frequency( 500 MHz bandwidth) and can apply to marine radar systems.

• Journal of IKEEE
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• v.23 no.1
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• pp.181-187
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• 2019

In this paper, we demonstrated a power amplifier monolithic microwave integrated circuit (MMIC) for X-band radar applications. It utilizes commercial $0.25{\mu}m$ GaN-based high electron mobility transistor (HEMT) technology and delivers more than 20 W of output power. The developed GaN-based power amplifier MMIC has small signal gain of over 22 dB and saturated output power of over 43.3 dBm (21.38 W) in a pulse operation mode with pulse width of $200{\mu}s$ and duty cycle of 4% over the entire band of 9 to 10 GHz. The chip dimensions are $3.5mm{\times}2.3mm$, generating the output power density of $2.71W/mm^2$. Its power added efficiency (PAE) is 42.6-50.7% in the frequency bandwidth from 9 to 10 GHz. The developed GaN-based power amplifier MMIC is expected to be applied in a variety of X-band radar applications.

• ETRI Journal
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• v.36 no.6
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• pp.924-930
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• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.22-29
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• 2009

In this paper, we developed the 200-Watts SSPA(Solid State Power Amplifier) for the X-band pulse compression solid state radar. The developed X-band SSPA is consists of 3-stage CSA(Corporate Structured Amplifier) modules in pre-amplifier stage, driver-amplifier stage and main-power amplifier stage. The main-power amplifier stage of SSPA designed by balanced type using GaN HEMT with enough power and gain to generate power more than 200-Watts in X-band. The developed SSPA has performance with more than total gain 59dB and output power 200-Watts in condition of frequency range 9.2-9.6GHz, pulse period 1msec, pulse width 100usec and duty cycle 10%. The developed SSPA in this paper can apply to high quality solid state radar system with pulse compression technique.