ETRI Journal

Electronics and Telecommunications Research Institute (한국전자통신연구원)
권호 표지
DOI QR코드

DOI QR Code

3-Level Envelope Delta-Sigma Modulation RF Signal Generator for High-Efficiency Transmitters

  • Seo, Yongho (Department of Electronic Engineering, Dong-A University) ;
  • Cho, Youngkyun (Communications & Internet Research Laboratory, ETRI) ;
  • Choi, Seong Gon (College of Electrical & Computer Engineering, Chungbuk National University) ;
  • Kim, Changwan (Department of Electronic Engineering, Dong-A University)
  • Received : 2014.02.18
  • Accepted : 2014.08.05
  • Published : 2014.12.01
Download PDF
⟨ Previous Next ⟩

Abstract

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

Keywords

References

  1. Y. Wang, "An Improved Kahn Transmitter Architecture Based on Delta-Sigma Modulation," IEEE MTT-S Int. Microw. Symp. Dig., Philadelphia, PA, USA, vol. 2, June 8-13, 2003, pp. 1327-1330.
  2. M. Nielsen and T. Larsen, "A Transmitter Architecture Based on Delta-Sigma Modulation and Switch-Mode Power Amplification," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 8, Aug. 2007, pp. 735-739. https://doi.org/10.1109/TCSII.2007.899457
  3. C. Berland et al., "A Transmitter Architecture for Nonconstant Envelope Modulation," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 53, no. 1, Jan. 2006, pp. 13-17. https://doi.org/10.1109/TCSII.2005.854594
  4. J. Choi et al., "A Delta-Sigma-Digitized Polar RF Transmitter," IEEE Trans. Microw. Theory Techn., vol. 55, no. 12, Dec. 2007, pp. 2679-2690. https://doi.org/10.1109/TMTT.2007.907137
  5. J.H. Kim et al., "60% High-Efficient 3G LTE Power Amplifier with Three-Level Delta Sigma Modulation Assisted by Dual Supply Injection," IEEE MTT-S Int. Microw. Symp. Dig., Baltimore, MD, USA, June 5-10, 2011, pp. 1-4.
  6. T. Sowlati et al., "Single-Chip Multiband WCDMA/HSDPA/HSUPA/EGPRS Transceiver with Diversity Receiver and 3G Digital RF Interface without SAW Filters in Transmitter 13G Receiver Paths," ISSCC Dig. Tech. Papers, San Francisco, CA, USA, Feb. 8-12, 2009, pp. 116-117.
  7. X. He and J.V. Sinderen, "A 45 nm Low-Power SAW-less WCDMA Transmit Modulator Using Direct Quadrature Voltage Modulation," IEEE Int. Solid-State Circuits Conf., San Francisco, CA, USA, Feb. 8-12, 2009, pp. 120-121.
  8. F. Tillman, N. Troedsson, and H. Sjland, "A 1.2 Volt 1.8 GHz CMOS Quadrature Front-End," Symp. VLSI Circuits Dig. Techn. Papers, June 17-19, 2004, pp. 362-365.
  9. B. Razavi, RF Microelectronics, New Jersey, USA: Prentice Hall PTR, 1998, pp. 91-93.
  10. K.W. Kobayashi, "An 8 W 250 MHz to 3 GHz Decade-Bandwidth Low-Noise GaN MMIC Feedback Amplifier with >+51 dBm OIP3," IEEE J. Solid-State Circuits, vol. 47, no. 10, Oct. 2012, pp. 2316-2326. https://doi.org/10.1109/JSSC.2012.2204929
  11. A. Bevilacqua and A.M. Niknejad, "An Ultrawideband CMOS LNA for 3.1 to 10.6 GHz Wireless Receiver," IEEE Int. Solid-State Circuits Conf. Dig. Techn. Papers, San Francisco, CA, USA, Feb. 15-19, 2004, pp. 382-383.
  12. R. Sapawi et al., "Low Group Delay 3.1-10.6 GHz CMOS Power Amplifier for UWB Applications," IEEE Microw. Wireless Compon. Lett., vol. 22, no. 1, Jan. 2012, pp. 41-43. https://doi.org/10.1109/LMWC.2011.2176475
  13. C.-Y. Hsiao, T.-Y. Su, and S.S.H. Hsu, "CMOS Distributed Amplifiers Using Gate-Drain Transformer Feedback Technique," IEEE Trans. Microw. Theory Techn., vol. 61, no. 8, Aug. 2013, pp. 2901-2910. https://doi.org/10.1109/TMTT.2013.2271614
  14. K. Moez and M. Elmasry, "A 10 dB 44 GHz Loss-Compensated CMOS Distributed Amplifier," IEEE Int. Solid-State Circuits Conf. Dig. Techn. Papers, San Francisco, CA, USA, Feb. 11-15, 2007, pp. 548-549.

Cited by

  1. 전력증폭기의 효율 및 선형성 개선을 위한 포락선 제거 및 복원 송신기 vol.26, pp.3, 2014, https://doi.org/10.5515/kjkiees.2015.26.3.292
  2. 5.2 mW 61 dB SNDR 15 MHz Bandwidth CT ΔΣ Modulator Using Single Operational Amplifier and Single Feedback DAC vol.38, pp.2, 2014, https://doi.org/10.4218/etrij.16.2515.0010
  3. Wideband and multiband long-term evolution transmitter using envelope delta-sigma modulation technique vol.91, pp.1, 2014, https://doi.org/10.1007/s10470-017-0926-2