• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.5
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• pp.37-43
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• 2012

The closed-loop multiple-input multiple-output (MIMO) system has been adopted by long term evolution (LTE) system. Many techniques are proposed to enhance the transmission of LTE's advanced version to meet the increasing requirement, in which differential codebook gains a lot of interest. Previous researches on designing differential codebooks focused on quasi-diagonal unitary matrix which cannot guarantee the equal gain property. The equal gain property is very important to uplink because the performance of uplink is very sensitive to the peak-to-average power ratio (PAPR). In this paper, we derive the analytical expression of average bit error rate and PAPR for differential precoding MIMO system. Using the analytical results, we investigate the performances of several differential precoding schemes considering non-linear amplifier at the transmitter. Some selected simulation results indicate that the conventional differential precoding schemes have good performances without the consideration of non-linear amplifier. While considering non-linear amplifier, the proposed differential codebook outperforms other differential precoding schemes because it maintains the equal gain per transmit antenna.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.13-20
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• 2001

In this appear, we proposed the new current mirror has large output resistance and excellent current matching characteristics. If supply voltage were lowered under the conventional CMOS operational amplifier, the wing of out put power could be restricted. So, the paper suggests a new way of differential operational amplifier circuit to solve the problem. The paper proposes that a new current mirror increases output swing and has a stable operation. We compare and verify characteristics of the proposed current mirror with the cascoded current mirror and the regulated current mirror through simulation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.4
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• pp.278-283
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• 2013

This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using $0.13{\mu}m$ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is $29{\mu}W$ and chip area is $75{\mu}m{\times}90{\mu}m$.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.517-520
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• 2002

This paper has been studied Operational Amplification Circuit that has high power specification of 90 W is designed. In the input differential amplifier stage, the current source for circuit bias is designed to protect device from high voltage source. the criving state has the voltage gain more than input differential stage. With temperature compensation design, output stage works stable in different to temperature.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.59-67
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• 2016

A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.26-36
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• 2008

Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.9 no.4
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• pp.17-24
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• 1972

A simply constructed and inexpensive amplifier that exhibits unusually low noise is studied. The high-performance differential amplifier combines high input impedence, adjustable gain, low in put noise and low output impedance. The amplifier is particularly useful in applications which call for large amplificaions of very low level signals.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.687-694
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• 2016

A differential power amplifier operating at millimeter-wave frequencies is demonstrated using a 65-nm CMOS technology. All of the input, output, and inter-stage network are implemented by transformers only, enabling impedance matching with low loss and a wide bandwidth. The millimeter-wave power amplifier exhibits measured small-signal gain exceeding 12.6 dB over a 3-dB bandwidth from 45 to 56 GHz. The output power and PAE are 13 dBm and 11.7%, respectively at 50 GHz.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.9
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• pp.1359-1368
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• 1989

In this paper, the composite BiCMOS transistor which combines a bipolar transistor and a MOS transistor in a cascade type, is analyzed in terms of I-V characteristics and small signal equivalent circuit. As a result, it has a larger driving capability than MOS transistor and a more extended rante of input voltage than bipolar transistor. Next, a BiCMOS differential amplifier as its application example is designed and compared with the CMOS one and the bipolar one. It increases the driving capability of the CMOS differential amp and improves the linear operation region of the bipolar differential amp.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.905-908
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• 2005

본 논문에서는 class AB opamp 를 채용한 384kHz differential PWM 신호를 입력으로 하는 2-channel stereo audio amplifier 블록을 공급전압 3.3V 조건에서 SMIC 0.18um thick oxide 기술을 이용하여 설계한다. 여기서 class AB opamp 는 공정 변화에 따른 quiescent current가 변하는 것을 최소화하기 위하여 adaptive load 를 사용하며, 전체적으로는 3 차 Butterworth lowpass filter 와 differential-to-single converter 로 구성된 2 개의 audio amplifier 와 출력전압이 ${\frac{1}{2}}Vdd$ 인 common output 블록으로 구성된다. 이러한 설계를 통하여 32ohm 의 저항 load 를 구동할 수 있는 -60dB THD, 전체 quiescent current 2mA 대인 CMOS class AB stereo audio amplifier 를 구현하였다.