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Design and Fabrication of 0.5 V Two Stage Operational Amplifier Using Body-driven Differential Input Stage and Self-cascode Structure

바디 구동 차동 입력단과 Self-cascode 구조를 이용한 0.5 V 2단 연산증폭기 설계 및 제작

  • Gim, Jeong-Min (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Lee, Dae-Hwan (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Baek, Ki-Ju (Department of Semiconductor Engineering, Chungbuk National University) ;
  • Na, Kee-Yeol (Department of Semiconductor Electronics, Chungbuk Provincial College) ;
  • Kim, Yeong-Seuk (Department of Semiconductor Engineering, Chungbuk National University)
  • 김정민 (충북대학교 반도체공학과) ;
  • 이대환 (충북대학교 반도체공학과) ;
  • 백기주 (충북대학교 반도체공학과) ;
  • 나기열 (충북도립대학 반도체전자전공) ;
  • 김영석 (충북대학교 반도체공학과)
  • Received : 2013.01.09
  • Accepted : 2013.03.24
  • Published : 2013.04.01

Abstract

This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using $0.13{\mu}m$ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is $29{\mu}W$ and chip area is $75{\mu}m{\times}90{\mu}m$.

Keywords

References

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