• Proceedings of the KIEE Conference
• /
• 2011.07a
• /
• pp.25-26
• /
• 2011

In this paper, we investigated the effect of various annealing processes on the electrical characteristics of oxide thin film transistors (TFTs). When we annealed the TFT devices before and after source/drain (S/D) process, we could observe the different electrical characteristics of oxide TFTs. When we annealed the TFTs after deposition of transparent indium zinc oxide S/D electrodes, the annealing process decreased the contact resistance but increased the resistivity of S/D electrodes. The field effect mobility, subthreshold slope and threshold voltage of the oxide TFTs annealed before and after S/D process were 5.83 and 4.47 $cm^2$/Vs, 1.20 and 0.82 V/dec, and 3.92 and 8.33 V respectively. To analyze the differences, we measured the contact resistances and the carrier concentrations using transfer length method (TLM) and Hall measurement.

• Journal of Electrical Engineering and Technology
• /
• v.12 no.6
• /
• pp.2353-2358
• /
• 2017

A femtosecond laser pre-annealing process based on indium zinc oxide (IZO) thin-film transistors (TFTs) is fabricated. We demonstrate a stable pre-annealing process to analyze surface structure change of thin films, and we maintain electrical stability and improve electrical performance. Furthermore, dynamic electrical characteristics of the IZO TFTs were investigated. Femtosecond laser pre-annealing process-based IZO TFTs exhibit a field-effect mobility of $3.75cm^2/Vs$, an $I_{on}/I_{off}$ ratio of $1.77{\times}10^5$, a threshold voltage of 1.13 V, and a subthreshold swing of 1.21 V/dec. And the IZO-based inverter shows a fast switching behavior response. From this study, IZO TFTs from using the femtosecond laser annealing technique were found to strongly affect the electrical performance and charge transport dynamics in electronic devices.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.33A no.7
• /
• pp.127-133
• /
• 1996

In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photoresist reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate form both sides of the main gate. The poly-Si channel layer below the offset oxide is protected form the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of oru new device is the offset region due to the offset oxide. our experimental reuslts show that the offset region, due to the photoresist reflow process, has been sucessfully obtained in order to fabricate the offset gated poly-Si TFTs. The maximum ON/OFF ratio occurs at the L$_{off}$ of 1.1${\mu}$m and exceeds 1X10$^{6}$.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.439-442
• /
• 2006

We evaluated a-Si:H TFTs fabricated on polyimide substrate (PI) at the highest temperature of $160^{\circ}C$ with uniaxial and tensile strain to imitate flexible display. With tensile strain, the threshold voltage of a-Si:H TFTs have positive shift due to extra dangling bond formation in a-Si:H layer. However, no significant degradation of the subthreshold swing and effective mobility with tensile strain of a-Si:H TFTs indicates the similar level of band tail state. The metal wire with the width of $10\;{\mu}m$ for connection on flexible substrate can sustain with curvature radius 2.5 cm.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.940-943
• /
• 2005

The characteristics of a-Si:H TFTs with silicon oxide as passivation layer were reported. It was studied that the insulating characteristics and step coverage characteristics of low temperature silicon oxide before applying to a-Si:H TFT fabrications. With the optimum deposition conditions considering electrical and deposition characteristics, low temperature silicon oxide was applied to a-Si:H TFTs. The changes in characteristics of a-Si:H TFTs were analyzed after replacing silicon nitride passivation layer with low temperature silicon oxide layer. This low temperature silicon oxide can be adapted to high resolution a-Si:H TFT LCD panels.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.1297-1300
• /
• 2005

We propose a new pixel design for active matrix organic light emitting diode (AM-OLED) displays using hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). The pixel circuit is composed of five TFTs and one capacitor, and employs only one additional control signal line. It is verified by SPICE simulation results that the proposed pixel compensates the threshold voltage shift of the a-Si:H TFTs and OLED.

• Transactions on Electrical and Electronic Materials
• /
• v.11 no.6
• /
• pp.253-256
• /
• 2010

Different active layer thicknesses for zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric using injector type atomic layer deposition. The properties of the ZnO TFTs were influenced by the active thickness and width-to-length (W/L) ratio of the device. The threshold voltage of ZnO TFTs shifted positively as the active layer thickness decreased, while the subthreshold slope decreased. The W/L ratio of ZnO TFTs also affected the mobility and subthreshold slope. An optimized TFT structure exhibited an on-tooff current ratio of above 106 with solid saturation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.30 no.7
• /
• pp.413-416
• /
• 2017

We investigated solution-processed indium-yttrium-oxide (IYO) TFTs using apoly (methyl methacrylate) (PMMA) passivation layer. The IYO semiconductor solution was prepared with 0.1 M indium nitrate hydrate and 0.1 M yttrium acetate dehydrate as precursor solutions. The solution-processed IYO TFTs showed good performance: field-effect mobility of $13.13cm^2/Vs$, a threshold voltage of 8.2 V, a subthreshold slope of 0.93 V/dec, and a current on-to-off ratio of $7.2{\times}10^6$. Moreover, the PMMA passivation layers used to protectthe IYO active layer of the TFTs, did so without deteriorating their performance under ambient conditions; their operational stability and electrical properties also improved by decreasing leakage current.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.2
• /
• pp.249-254
• /
• 2015

Solution-derived amorphous indium-gallium-zinc oxide (a-IGZO) thin-film-transistor (TFTs) were developed using a microwave irradiation treatment at low process temperature below $300^{\circ}C$. Compared to conventional furnace-annealing, the a-IGZO TFTs annealed by microwave irradiation exhibited better electrical characteristics in terms of field effect mobility, SS, and on/off current ratio, although the annealing temperature of microwave irradiation is much lower than that of furnace annealing. The microwave irradiated TFTs showed a smaller $V_{th}$ shift under the positive gate bias stress (PGBS) and negative gate bias stress (NGBS) tests owing to a lower ratio of oxygen vacancies, surface absorbed oxygen molecules, and reduced interface trapping in a-IGZO. Therefore, microwave irradiation is very promising to low-temperature process.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.524-526
• /
• 2009

The effects of In and Ga contents on characteristics of InGaZnO (IGZO) films grown by a sol-gel method and their thin film transistors (TFTs) have been investigated. Excess In incorporation into IGZO enhances the field effect mobilities of the TFTs due to the increase in conducting path ways, and decreases the grain size and the surface roughness of the films because more $InO_2^-$ ions induce cubic stacking faults with IGZO. Ga incorporation into results in decrease in carrier concentration of films and off-current of TFTs since Ga ion forms stronger chemical bonds with oxygen than Zn and In ions, acting as a carrier killer.