• 제목/요약/키워드: Silicidation

검색결과 91건 처리시간 0.021초

Cu/Ti-cappng/NiSi 전극구조 p+/n 접합의 전기적 특성 (Electrical Characteristics of p+/n Junctions with Cu/Ti-capping/NiSi Electrode)

  • 이근우;김주연;배규식
    • 한국재료학회지
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    • 제15권5호
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    • pp.318-322
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    • 2005
  • Ti-capped NiSi contacts were formed on $p^+/n$ junctions to improve the leakage problem and then Cu was deposited without removing the Ti-capping layer in an attempt to utilize as a diffusion barrier. The electrical characteristics of these $p^+/n$ diodes with Cu/Ti/NiSi electrodes were measured as a function of drive-in RTA(rapid-thermal annealing) and silicidation temperature and time. When drive-in annealed at $900^{\circ}C$, 10 sec. and silicided at $500^{\circ}C$, 100 sec., the diodes showed the most excellent I-V characteristics. Especially, the leakage current was $10^{-10}A$, much lower than reported data for diodes with NiSi contacts. However, when the $p^+/n$ diodes with Cu/Ti/NiSi contacts were furnace-annealed at $400^{\circ}C$ for 40 min., the leakage current increased by 4 orders. The FESEM and AES analysis revealed that the Ti-capping layer effectively prohibited the Cu diffusion, but was ineffective against the NiSi dissociation and consequent Ni diffusion.

Stepwise Ni-silicide Process for Parasitic Resistance Reduction for Silicon/metal Contact Junction

  • Choi, Hoon;Cho, Il-Whan;Hong, Sang-Jeen
    • Transactions on Electrical and Electronic Materials
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    • 제9권4호
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    • pp.137-142
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    • 2008
  • The parasitic resistance is studied to silicon/metal contact junction for improving device performance and to lower contact/serial resistance silicide in natural sequence. In this paper constructs the stepwise Ni silicide process for parasitic resistance reduction for silicon/metal contact junction. We have investigated multi-step Ni silicide on SiGe substrate with stepwise annealing method as an alternative to compose more thermally reliable Ni silicide layer. Stepwise annealing for silicide formation is exposed to heating environment with $5^{\circ}C/sec$ for 10 seconds and a dwelling for both 10 and 30 seconds, and ramping-up and the dwelling was repeated until the final annealing temperature of $700\;^{\circ}C$ is achieved. Finally a direct comparison for single step and stepwise annealing process is obtained for 20 nm nickel silicide through stepwise annealing is $5.64\;{\Omega}/square$ at $600\;^{\circ}C$, and it is 42 % lower than that of as nickel sputtered. The proposed stepwise annealing for Ni silicidation can provide the least amount of NiSi at the interface of nickel silicide and silicon, and it provides lower resistance, higher thermal-stability, and superior morphology than other thermal treatment.

$SiO_2$와 Co/Ti 이중층 구조의 상호반응 (Interaction of Co/Ti Bilayer with $SiO_2$ Substrate)

  • 권영재;이종무;배대록;강호규
    • 한국진공학회지
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    • 제7권3호
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    • pp.208-213
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    • 1998
  • 최근 셀리사이드(salicide) 제조시 $COSiO_2$의 에피텍셜 성장을 돕기 위하여 Ti층을 삽 입한 Co/Ti/Si 이중층 구조의 실리사이드화가 관심을 끌고 있다. Co/Ti 이중층을 이용한 salicide 트랜지스터가 성공적으로 만들어지기 위해서는 gate 주위의 spacer oxide위에 증착 된 Co/Ti 이중층을 급속열처리할 때 Co/Ti와 $SiO_2$간의 계면에서의 상호반응에 대하여 조사 하였다. Co/Ti 이중층은 $600^{\circ}C$에서 열처리한 후 면저항이 급격하게 증가하기 시작하였는데, 이것은 Co층이 $SiO_2$와의 계면에너지를 줄이기 위하여 응집되기 때문이다. 이때 Co/Ti의 열 처리후 Ti에 의하여 $SiO_2$기판의 일부가 분해됨으로써 절연체의 Ti산화물이 형성되었으나, 이외의 도전성 반응부산물은 발견되지 않았다.

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Ti-capped NiSi 형성 및 열적안정성에 관한 연구 (A Study on the Formation of Ti-capped NiSi and it′s Thermal Stability)

  • 박수진;이근우;김주연;배규식
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.288-291
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    • 2002
  • Application of metal silicides such as TiSi$_2$ and CoSi$_2$ as contacts and gate electrodes are being studied. However, TiSi$_2$ due to the linewidth-dependance, and CoSi$_2$ due to the excessive Si consumption during silicidation cannot be applied to the deep-submicron MOSFET device. NiSi shows no such problems and can be formed at the low temperature. But, NiSi shows thermal instability. In this investigation, NiSi was formed with a Ti-capping layer to improve the thermal stability. Ni and Ti films were deposited by the thermal evaporator. The samples were then annealed in the N$_2$ ambient at 300-800$^{\circ}C$ in a RTA (rapid thermal annealing) system. Four point probe, FESEM, and AES were used to study the thermal properties of Ti-capped NiSi layers. The Ti-capped NiSi was stable up to 700$^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after 600$^{\circ}C$. The AES results revealed that the Ni diffusion further into the Si substrate was retarded by the capping layer, resulting in the suppression of agglomeration of NiSi films.

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동시 접합 공정에 의한 자기정렬 코발트 실리사이트 및 얇은 접합 형성에 관한 연구 (A Study on the Self-Aligned Cobalt Silicidation and the Formation of a Shallow Junction by Concurrent Junction Process)

  • 이석운;민경익;주승기
    • 전자공학회논문지A
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    • 제29A권2호
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    • pp.68-76
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    • 1992
  • Concurrent Junction process (simultaneous formation of a silicide and a junction on the implanted substrate) by Rapid Thermal Annealig has been investigated. Electrical and material properties of CoSi$_2$ films were analyzed with Alpha Step, 4-point probe, X-ray diffraction(XRD) and Scanning Electron Microscope(SEM). And CoSi$_2$ junctions were examined with Spreading Resistance probe in order to see the redistribution of electrically activated dopants and determined the junction depth. Two step annealing process, which was 80$0^{\circ}C$ for 30sec and 100$0^{\circ}C$ for 30sec in NS12T ambient was employed to form CoSi$_2$ and shallow junctions. Resistivity of CoSi$_2$ was turned out to be 11-15${\mu}$cm and shallow junctions less than 0.1$\mu$m were successfully formed by the process. It was found that the dopant concentration at CoSi$_2$/Si interface increased as decreasing the thickness of Co films in case of $p^{+}/n$ and $n^{+}/p$ junctions while the junction depth decreased as increasing CoSiS12T thickness in case of $p^{+}/n$ junction.

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Co/내열금속/(100) Si 이중층 구조의 실리사이드화 (Silicidation of Co/M/(100) Si bilayer Structures)

  • 권영재;이종무;배대록;강호규
    • 한국세라믹학회지
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    • 제35권5호
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    • pp.505-511
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    • 1998
  • 단결정 Si 기판 위에 증착한 Co/Hf과 Co/Nb 이중층으로부터 형성된 Co 실리사이드의 성장기구에 대하여 조사하였다. 두 경우 모두 500$^{\circ}C$ 이상에서 CoSi2가 주로 형성되었으나 그 결정방위의 성장양상은 서로 달랐다. Co/Hf/(100)Si 구조에서는 Si 기판과 에피텍셜 관계를 갖는 결정립과 그렇지 않은 결정립이 서로 혼합되어 성장하였다. 그러나 Co/Nb/(100)Si에서는 처음부터 에피텍셜 관계를 갖지 않는 결정립들만이 형성되었다. 동일한 구조임에도 불구하고 이렇게 내열금속 중간층에 따라 성장된 실리사이드의 결정방위가 달라지는 것으 안정한 반응제어층의 형성 및 고온에서의 그 분해과정과 관련이 있었다. 여러 구성원소들로 이루어진 반응제어층이 고온까지 안정할 경우에는 Co의 확산이동을 균일하게 제어하여 실리사이드의 에피텍셜 성장이 가능하다.

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RTP를 사용한 타이타늄 실리사이드 형성의 공정 조절 (Process Control of Titanium Silicide Formation Using RTP)

  • 이용재
    • 한국통신학회논문지
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    • 제15권5호
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    • pp.399-405
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    • 1990
  • 急速 熱處理 공정을 高融點 타이타늄 실리사이드 형성을 위한 反應率의 연구와 정확한 形成 調節에 이용하였다. 試料는 n형 실리콘과 다결정 웨이퍼이며, 타이타늄을 스퍼터로 증착시켰다. 工程은 질소와 아르곤 가스 분위기 下에 실리사이드 형성을 정확하게 조절하기 위해 急速 時間 溫度 분포의 行列로 수행하였다. 반응된 박막은 面抵抗 측정과 전자현미경 사진, 自動分 抛抵抗 측정, X-선 回折 등으로 分析하였다. 結果는 실리사이드의 抵抗度는 20$\mu$$\Omega$-cm이하 이고, 박막 두께는 타이타늄 燕着 의 두께보다 약 2배로 나타났다. 실리사이드 形成 분위기는 아르곤과 窒素가 同一한 溫度 時間 조건에서 形成되었다.

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코발트/니켈 합금박막으로부터 형성된 복합실리사이드 (Characterization of Composite Silicide Obtained from NiCo-Alloy Films)

  • 송오성;정성희;김득중
    • 한국재료학회지
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    • 제14권12호
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    • pp.846-850
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    • 2004
  • NiCo silicide films have been fabricated from $300{\AA}-thick\;Ni_{1-x}Co_{x}(x=0.1\sim0.9)$ on Si-substrates by varying RTA(rapid thermal annealing) temperatures from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 sec. Sheet resistance, cross-sectional microstructure, and chemical composition evolution were measured by a four point probe, a transmission electron microscope(TEM), and an Auger depth profilemeter, respectively. For silicides of the all composition and temperatures except for $80\%$ of the Ni composition, we observed small sheet resistance of sub- $7\;{\Omega}/sq.,$ which was stable even at $1100^{\circ}C$. We report that our newly proposed NiCo silicides may obtain sub 50 nm-thick films by tunning the nickel composition and silicidation temperature. New NiCo silicides from NiCo-alloys may be more appropriate for sub-0.1${\mu}m$ CMOS process, compared to conventional single phase or stacked composit silicides.

Cu/Capping Layer/NiSi 접촉의 상호확산 (Interdiffusion in Cu/Capping Layer/NiSi Contacts)

  • 유정주;배규식
    • 한국재료학회지
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    • 제17권9호
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    • pp.463-468
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    • 2007
  • The interdiffusion characteristics of Cu-plug/Capping Layer/NiSi contacts were investigated. Capping layers were deposited on Ni/Si to form thermally-stable NiSi and then were utilized as diffusion barriers between Cu/NiSi contacts. Four different capping layers such as Ti, Ta, TiN, and TaN with varying thickness from 20 to 100 nm were employed. When Cu/NiSi contacts without barrier layers were furnace-annealed at $400^{\circ}C$ for 40 min., Cu diffused to the NiSi layer and formed $Cu_3Si$, and thus the NiSi layer was dissociated. But for Cu/Capping Layers/NiSi, the Cu diffusion was completely suppressed for all cases. But Ni was found to diffuse into the Cu layer to form the Cu-Ni(30at.%) solid solution, regardless of material and thickness of capping layers. The source of Ni was attributed to the unreacted Ni after the silicidation heat-treatment, and the excess Ni generated by the transformation of $Ni_2Si$ to NiSi during long furnace-annealing.

Nano CMOS소자를 위한 Ni-silicide의 Dopant 의존성 분석 (Dependence on Dopant of Ni-silicide for Nano CMOS Device)

  • 배미숙;지희환;이헌진;오순영;윤장근;황빈봉;왕진석;이희덕
    • 대한전자공학회논문지SD
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    • 제40권11호
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    • pp.1-8
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    • 2003
  • 본 논문에서는 소스/드레인 및 게이트의 불순물에 따른 실리사이드의 의존성을 면저항과 단면 특성 등의 분석을 통하여 연구하였다. 급속 열처리 후에는 As, P, BF₂, B/sub 11/ 등과 같은 불순물에 대한 먼저항의 차이가 거의 나지 않았다. 하지만 실리사이드 형성 후히 고온 열처리시에 그 특성이 매우 크게 변화하였다. BF₂를 주입한 시편에서의 특성이 가장 좋게 나타난 반면, As를 주입한 실리사이드의 특성이 가장 열화되었다. BF₂를 주입한 시편에서의 실리사이드 특성 향상은 flourine에 의한 니켈의 확산 방지 때문인 것으로 여겨진다. 그러므로 실리사이드의 성능 향상을 위해 Ni의 확산을 방지시키는 것이 매우 필요하다.