• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.169-172
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• 2008

We attempted to fabricate carbon nanotube field effect transistor (CNT-FET) using single walled carbon nanotube(SWNT) on the heavily doped Si substrate used as a bottom gate, source and drain electrode were fabricated bye-beam lithography on the 500 nm thick $SiO_2$ gate dielectric layer. We investigated electrical and physical properties of this CNT-FET using Scanning Probe Microscope(SPM) and conventional method based on tungsten probe tip technique. The gate length of CNT-FET was 600 nm and the diameter of identified SWNT was about 4 nm. We could observed gating effect and typical p-MOS property from the obtained $V_G-I_{DS}$ curve. The threshold voltage of CNT-FET is about -4.6V and transconductance is 47 nS. In the physical aspect, we could identified SWNT with phase mode of SPM which detecting phase shift by force gradient between cantilever tip and sample surface.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.197-198
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• 2014

본 논문에서는 Si MOSFET을 차세대 반도체인 GaN FET(Gallium Nitride Field Effect Transistor)으로의 대체 할 시 발생하는 문제점을 분석한다. 다양한 전력변환 시스템에 적용 가능한 위상 천이 풀브리지(Phase Shifted Full Bridge) DC-DC 컨버터를 대상으로 각각 Si MOSFET 및 GaN FET를 적용하고 실험을 통해 문제점을 확인 및 분석한다.

• Proceeding of EDISON Challenge
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• 2013.04a
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• pp.292-293
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• 2013

Sub 10-nm thick of Si plate is simulated with the software for Nanowire Field Effect Transistor (FET) device simulation. With usual single crystal Si technology, it is difficult to realize flexible electronic devices. Here, we suggest a FET device based on thinned Si layer. The simulation implied a practical limitation of the Si plate thickness for flexible devices as 2 nm. With around this thickness, Si plate may have much flexibility than existing bulk MOSFETs.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.13-16
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• 2000

A quantum-wire field effect transistor(QW-FET) using asymmetric double InGaAs channel and Si-delta doped barrier has been fabricated. It exhibited good modulation and saturation characteristic in the range of ${\mu}\textrm{A}$ current level. For estimated channel width of 150nm QW-FET, maximum transconductance was about 400 mS/mm which is higher than a conventional heterostructure FET(HFET) with the same epi-structure.

• Current Applied Physics
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• v.18 no.12
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• pp.1546-1552
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• 2018

The polymer nanocomposite as a gate dielectric film was prepared via sol-gel method. The formation of crosslinked structure among nanofillers and polymer matrix was proved by Fourier transform infrared spectroscopy (FT-IR). Differential thermal analysis (DTA) results showed significant increase in the thermal stability of the nanocomposite with respect to that of pure polymer. The nanocomposite films deposited on the p- and n-type Si substrates formed very smooth surface with rms roughness of 0.045 and 0.058 nm respectively. Deconvoluted $Si_{2s}$ spectra revealed the domination of the Si-OH hydrogen bonds and Si-O-Si covalence bonds in the structure of the nanocomposite film deposited on the p- and n-type Si semiconductor layers respectively. The fabricated n-channel field-effect-transistor (FET) showed the low threshold voltage and leakage currents because of the stronger connection between the nanocomposite and n-type Si substrate. Whereas, dominated hydroxyl groups in the nanocomposite dielectric film deposited on the p-type Si substrate increased trap states in the interface, led to the drop of FET operation.

• Transactions on Electrical and Electronic Materials
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• v.8 no.3
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• pp.139-142
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• 2007

Organic field-effect transistor (FET) based on a copper Phthalocyanine (CuPc) material as an active layer and a $SiO_2$ as a gate insulator were fabricated and analyzed. We measured the typical FET characteristics of CuPc in air. The electrical characteristics of the CuPc FET device were analyzed by a Maxwell-Wagner model. The Maxwell-Wagner model employed in analyzing double-layer dielectric system was helpful to explain the C-V and I-V characteristics of the FET device. In order to further clarity the channel formation of the CuPc FET, optical second harmonic generation (SHG) measurement was also employed. Interestingly, SHG modulation was not observed for the CuPc FET. This result indicates that the accumulation of charge from bulk CuPc makes a significant contribution.

• ETRI Journal
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• v.38 no.1
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• pp.133-140
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• 2016

This paper presents a method of parasitic inductance reduction for high-speed switching and high-efficiency operation of a cascode structure with a low-voltage enhancement-mode silicon (Si) metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-voltage depletion-mode gallium nitride (GaN) fielde-ffect transistor (FET). The method is proposed to add a bonding wire interconnected between the source electrode of the Si MOSFET and the gate electrode of the GaN FET in a conventional cascode structure package to reduce the most critical inductance, which provides the major switching loss for a high switching speed and high efficiency. From the measured results of the proposed and conventional GaN cascode FETs, the rising and falling times of the proposed GaN cascode FET were up to 3.4% and 8.0% faster than those of the conventional GaN cascode FET, respectively, under measurement conditions of 30 V and 5 A. During the rising and falling times, the energy losses of the proposed GaN cascode FET were up to 0.3% and 6.7% lower than those of the conventional GaN cascode FET, respectively.

• Bulletin of the Korean Chemical Society
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• v.31 no.6
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• pp.1561-1567
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• 2010

In this study, we have developed a new detection method using Si field effect transistor (FET)-type biosensors, which enables the direct monitoring of antigen-antibody binding within very high-ionic-strength solutions such as 1$\times$PBS and human serum. In the new method, as no additional dilution or desalting processes are required, the FET-type biosensors can be more suitable for ultrasensitive and real-time analysis of raw sample solutions. The new detection scheme is based on the observation that the strength of antigen-antibody-specific binding is significantly influenced by the ionic strength of the reaction solutions. For a prostate specific antigen (PSA), in some conditions, the binding reaction between PSA and anti-PSA in a low-ionic strength reaction solution such as 10 ${\mu}M$ phosphate buffer is weak (reversible), while that in high-ionic strength reaction solutions such as 1$\times$PBS or human serum is strong.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.303.1-303.1
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• 2014

좋은 전기적 특성을 가지면서 소자의 크기를 줄이기에 용이한 Gate-all-around (GAA) twin Si nanowire field-effect transistors (TSNWFETs)의 연구가 많이 진행되고 있다. Switching 특성과 단채널 효과가 없는 TSNWFETs의 특성은 GAA 구조의 본질적인 특성이다. TSNWFETs는 기존의 single Si nanowire TSNWFETs와 bulk FET에 비하여 Drive current가 nanowire의 지름에 많은 영향을 받지 않는다. 그러나 TSNWFETs의 전체 on-current는 훨씬 작고 nanowire의 지름이 작아지면서 줄어들게 되면서 소자의 sensing speed와 sensing margin 특성의 악화를 가지고 온다. GAA TSNWFETs의 제작 및 전기적 실험에 대한 연구는 많이 진행되었으나, GAA TSNWFETs의 전기적 특성에 대한 이론적 연구는 매우 적다. 본 연구에서는 GAA TSNWFETs의 nanowire 크기에 따른 전기적 특성을 관찰하였다. GAA TSNWFETs와 bulk FET의 전기적 특성을 양자역학을 고려하여 3차원 TCAD 시뮬레이션을 툴을 이용하여 계산하였다. GAA TSNWFETs와 bulk FET의 전류-전압 특성 계산을 통해 on-current 크기, subthreshold swing, drain-induced barrier lowering (DIBL), gate-induced drain leakage를 보았다. 전류가 흐르는 경로와 전기적 특성의 물리적 의미에 대한 연구를 위해 TSNWFETs에서의 전류 밀도, conduction band edge, potential 특성을 분석하였다. 시뮬레이션 결과를 통해 Switching 특성, 단채널 효과에 대한 면역 특성, nanowire의 단면적에 따른 전류 흐름을 보았다. nanowire의 크기가 작아지면서 DIBL이 증가하고 문턱전압과 전체 on-current는 감소하면서 소자의 특성이 악화된다. 이러한 결과는 GAA TSNWFETs의 전기적 특성을 이해하고 좋은 소자 특성을 위한 구조를 연구하는데 많은 도움이 될 것이다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.22-29
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• 2006

We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.