• Title/Summary/Keyword: Short-channel Effect

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Fin의 두께와 높이 변화에 따른 22 nm FinFET Flash Memory에서의 전기적 특성

  • Seo, Seong-Eun;Kim, Tae-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.329-329
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    • 2012
  • Mobile 기기로 둘러싸여있는 현대의 환경에서 Flash memory에 대한 중요성은 날로 더해가고 있다. Flash memory의 가격 경쟁력 강화와 사용되는 기기의 소형화를 위해 flash memory의 비례축소가 중요한 문제로 부각되고 있다. 그러나 다결정 실리콘을 플로팅 게이트로 이용하는planar flash memory 소자의 경우 비례 축소 시 short channel effect 와 leakage current, subthreshold swing의 증가로 인한 성능저하와 같은 문제들로 인해 한계에 다다르고 있다. 이를 해결하기 위해 CTF 메모리 소자, nanowire FET, FinFET과 같은 새로운 구조를 가지는 메모리소자에 대한 연구가 활발히 진행되고 있다. 본 연구에서는 22 nm 게이트 크기의 FinFET 구조를 가지는 플래시 메모리소자에서 fin의 두께와 높이의 변화에 따른 메모리 소자의 전기적 특성을 3-dimensional 구조에서 technology computer aided design ( TCAD ) tool을 이용하여 시뮬레이션 하였다. 본 연구에서는 3D FinFET 구조를 가진 플래시 메모리에 대한 시뮬레이션 하였다. FinFET 구조에서 채널영역은 planar 구조와 다르게 표면층이 multi-orientation을 가지므로 본 계산에서는 multi-orientation Lombardi mobility model을 이용하여 계산하였다. 계산에 사용된 FinFET flash memory 구조는 substrate의 도핑농도는 $1{\times}10^{18}$로 하였으며 source, drain, gate의 도핑농도는 $1{\times}10^{20}$으로 설정하여 계산하였다. Fin 높이는 28 nm로 고정한 상태에서 fin의 두께는 12 nm부터 28nm까지 6단계로 나누어서 각 구조에 대한 프로그램 특성과 전기적 특성을 관찰 하였다. 계산결과 FinFET 구조의 fin 두께가 두꺼워 질수록 채널형성이 늦어져 threshold voltage 값이 커지게 되고 subthreshold swing 값 또한 증가하여 전기적 특성이 나빠짐을 확인하였다. 각 구조에서의 전기장과 전기적 위치에너지의 분포가 fin의 두께에 따라 달라지므로써 이로 인해 프로그램 특성과 전기적 특성이 변화함을 확인하였다.

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Analysis of Effective Gate resistance characteristics in Nano-scale MOSFET for RFIC (RFIC를 위한 Nano-scale MOSFET의 Effective gate resistance 특성 분석)

  • 윤형선;임수;안정호;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.11
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    • pp.1-6
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    • 2004
  • Effective gate resistance, extracted by direct extraction method, is analyzed among various gate length, in nanoscale MOSFET for RFIC. Extracted effective gate resistance is compared to measured data and verified with simplified model. Extracted parameters are accurate to 10GHz. In the same process technology effect has a different kind of gate voltage dependency and frequency dependency compared with general effective gate resistance. Particularly, the characteristic of effective gate resistance before and after threshold voltage is noticeable. When gate voltage is about threshold voltage, effective gate resistance is abnormally high. This characteristic will be an important reference for RF MOSFET modeling using direct extraction method.

Analysis and Optimization of a Depletion-Mode NEMFET Using a Double-Gate MOSFET (Double-Gate MOSFET을 이용한 공핍형 NEMFET의 특성 분석 및 최적화)

  • Kim, Ji-Hyun;Jeong, Na-Rae;Kim, Yu-Jin;Shin, Hyung-Soon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.10-17
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    • 2009
  • Nano-Electro-Mechanical MOSFET (NEMFET) using Double-Gate MOSFET (DGMOS) structure can efficiently control the short channel effect. Espatially, subthreshold current of depletion-mode Double-Gate NEMFET (Dep-DGNEMFET) decreases in the off-state due to the thin equivalent-oxide thickness. Analytical $t_gap$ vs. $V_g$ equation for Dep-DGNEMFET is derived and characteristics for different device structures are analyzed. Dep-DGNEMFET structure is optimized to satisfy ITRS criteria.

Partially-insulated MOSFET (PiFET) and Its Application to DRAM Cell Transistor

  • Oh, Chang-Woo;Kim, Sung-Hwan;Yeo, Kyoung-Hwan;Kim, Sung-Min;Kim, Min-Sang;Choe, Jeong-Dong;Kim, Dong-Won;Park, Dong-Gun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.1
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    • pp.30-37
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    • 2006
  • In this article, we evaluated the structural merits and the validity of a partially insulated MOSFET (PiFET) through the fabrication of prototype transistors and an 80 nm 512M DDR DRAM with partially-insulated cell array transistors (PiCATs). The PiFETs showed the outstanding short channel effect immunity and off-current characteristics over the conventional MOSFET, resulting from self-induced halo region, self-limiting SID shallow junction, and reduced junction area due to PiOX layer formation. The DRAM with PiCATs also showed excellent data retention time. Thus, the PiFET can be a promising alternative for ultimate scaling of planar MOSFET.

Fatigue and mechanical properties of laser deposited maraging steel (레이저 적층 마레이징강의 기계적 특성 및 피로 특성)

  • Hong, Seok-Kwan
    • Design & Manufacturing
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    • v.12 no.3
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    • pp.36-41
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    • 2018
  • Metal 3D printing is very useful for making the injection molds containing complex conformal cooling channels. The most important issue of the 3D printed molds is cost and life cycle. However, powder bed fusion (PBF) methods are vulnerable to fatigue loading because of the presence of pores and rough surfaces. In the present study, the fatigue test was performed to obtain fatigue analysis input data for predicting the durability of a 3D printed injection mold core. The metal 3D printer used to manufacture the specimen was OPM250L from Sodick, and the metal powder material was maraging steel. The ultrasonic fatigue testing method was adopted for the fatigue test. A key advantage of the ultrasonic fatigue method is that $10^8{\sim}10^9$ long cycle test data or more could be obtained within a relatively short period. Based on the results of the experiment, the effect of heat treatment was negligible. However, there was an apparent difference in durability depending on the presence or absence of the surface treatment.

Fabrication of Micron-sized Organic Field Effect Transistors (마이크로미터 크기의 유기 전계 효과 트랜지스터 제작)

  • Park, Sung-Chan;Huh, Jung-Hwan;Kim, Gyu-Tae;Ha, Jeong-Sook
    • Journal of the Korean Vacuum Society
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    • v.20 no.1
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    • pp.63-69
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    • 2011
  • In this study, we report on the novel lithographic patterning method to fabricate organic thin film field effect transistors (OTFTs) based on photo and e-beam lithography with well-known silicon technology. The method is applied to fabricate pentacene-based organic field effect transistors. Owing to their solubility, sub-micron sized patterning of P3HT and PEDOT has been well established via micromolding in capillaries and inkjet printing techniques. Since the thermally deposited pentacene cannot be dissolved in solvents, other approach was done to fabricate pentacene FETs with a very short channel length (~30 nm), or in-plane orientation of pentacene molecules by using nanometer-scale periodic groove patterns as an alignment layer for high-performance pentacene devices. Here, we introduce $Al_2O_3$ film grown via atomic layer deposition method onto pentacene as a passivation layer. $Al_2O_3$ passivation layer on OTFTs has some advantages in preventing the penetration of water and oxygen and obtaining the long-term stability of electrical properties. AZ5214 and ma N-2402 were used as a photo and e-beam resist, respectively. A few micrometer sized lithography patterns were transferred by wet and dry etching processes. Finally, we fabricated micron sized pentacene FETs and measured their electrical characteristics.

Development of SiGe Heterostructure Epitaxial Growth and Device Fabrication Technology using Reduced Pressure Chemical Vapor Deposition (저압화학증착을 이용한 실리콘-게르마늄 이종접합구조의 에피성장과 소자제작 기술 개발)

  • Shim, K.H;Kim, S.H;Song, Y.J;Lee, N.E;Lim, J.W;Kang, J.Y
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.4
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    • pp.285-296
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    • 2005
  • Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 % in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.

A Causality Analysis of the Tangerine Market by Distribution Channel (감귤시장의 유통단계별 가격 인과성 분석)

  • Kang, Seok-Kyu;Ko, Bong-Hyun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.3
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    • pp.376-381
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    • 2018
  • The purpose of this study is to investigate price transmissions between wholesale and retail markets regarding Jeju tangerines by employing co-integration analysis and vector error correction model. The results of this study are summarized as follows: First, the long-run equilibrium relationship was found among wholesale and retail markets in time series for level by distribution channel. Second, a short-run causality relationship was observed between wholesale and retail markets. Third, the long-run causality relationship between wholesale market and retail markets was found bidirectional and feedback effect. These results imply that the wholesale price performs a central role in establishing price in the tangerine market, and the wholesale market influences tangerine price. In conclusion, for the development of a competitive tangerine industry, it is necessary to aggressively promote the policy of supply and demand control of tangerine production through organizing producers.

Characterization of Gate Oxides with a Chlorine Incorporated $SiO_2/Si$ Interface (염소(Chlorine)가 도입된 $SiO_2/Si$ 계면을 가지는 게이트 산화막의 특성 분석)

  • Yu, Byoung-Gon;Lyu, Jong-Son;Roh, Tae-Moon;Nam, Kee-Soo
    • Journal of the Korean Vacuum Society
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    • v.2 no.2
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    • pp.188-198
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    • 1993
  • We have developed a technique for growing thin oxides (6~10 nm) by the Last step TCA method. N-channel metal-oxide-semiconductor (n-MOS) capacitor and n-channel metal-oxide-semiconductor field-effect transistor's (MOSFET's) having a gate oxide with chlorine incorporated $SiO_2/Si$ interface have been analyzed by electrical measurements and physical methods, such as secondary ion mass spectrometry (SIMS) and electron spectroscopy for chemical analysis (ESCA). The gate oxide grown with the Last strp TCA method has good characteristics as follows: the electron mobility of the MOSFET's with the Last step TCA method was increased by about 7% and the defect density at the $SiO_2/Si$ interface decreases slightly compared with that with No TCA method. In reliability estimation, the breakdown field was 18 MV/cm, 0.6 MV/cm higher than that of the gate oxide with No TCA method, and the lifetime estimated by TDDB measurement was longer than 20 years. The device lifetime estimated from hot-carrier reliability was proven to be enhanced. As the results, the gate oxide having a $SiO_2/Si$ interface incorporated with chlorine has good characteristics. Our new technique of Last step TCA method may be used to improve the endurance and retention of MOSFET's and to alleviate the degradation of thin oxides in short-channel MOS devices.

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Poly-4-vinylphenol and Poly (melamine-co-formaldehyde)-based Tungsten Diselenide (WSe2) Doping Method

  • Nam, Hyo-Jik;Park, Hyung-Youl;Park, Jin-Hong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.194.1-194.1
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    • 2015
  • Transition metal dichalcogenide (TMD) with layered structure, has recently been considered as promising candidate for next-generation flexible electronic and optoelectronic devices because of its superior electrical, optical, and mechanical properties.[1] Scalability of thickness down to a monolayer and van der Waals expitaxial structure without surface dangling bonds (consequently, native oxides) make TMD-based thin film transistors (TFTs) that are immune to the short channel effect (SCE) and provide very high field effect mobility (${\sim}200cm^2/V-sec$ that is comparable to the universal mobility of Si), respectively.[2] In addition, an excellent photo-detector with a wide spectral range from ultraviolet (UV) to close infrared (IR) is achievable with using $WSe_2$, since its energy bandgap varies between 1.2 eV (bulk) and 1.8 eV (monolayer), depending on layer thickness.[3] However, one of the critical issues that hinders the successful integration of $WSe_2$ electronic and optoelectronic devices is the lack of a reliable and controllable doping method. Such a component is essential for inducing a shift in the Fermi level, which subsequently enables wide modulations of its electrical and optical properties. In this work, we demonstrate n-doping method for $WSe_2$ on poly-4-vinylphenol and poly (melamine-co-formaldehyde) (PVP/PMF) insulating layer and adjust the doping level of $WSe_2$ by controlling concentration of PMF in the PVP/PMF layer. We investigated the doping of $WSe_2$ by PVP/PMF layer in terms of electronic and optoelectronic devices using Raman spectroscopy, electrical measurements, and optical measurements.

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