• Title/Summary/Keyword: Schottky-barrier

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Experimental and Simulation Study of Barrier Properties in Schottky Barrier Thin-Film Transistors with Cr- and Ni- Source/Drain Contacts (Cr- 및 Ni- 소스/드레인 쇼트키 박막 트랜지스터의 장벽 특성에 대한 실험 및 모델링 연구)

  • Jung, Ji-Chul;Moon, Kyoung-Sook;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.10
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    • pp.763-766
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    • 2010
  • By improving the conducting process of metal source/drain (S/D) in direct contact with the channel, schottky barrier metal-oxide-semiconductor field effect transistors (SB MOSFETs) reveal low extrinsic parasitic resistances, offer easy processing and allow for well-defined device geometries down to the smallest dimensions. In this work, we investigated the arrhenius plots of the SB MOSFETs with different S/D schottky barrier (SB) heights between simulated and experimental current-voltage characteristics. We fabricated SB MOSFETs using difference S/D metals such as Cr (${\Phi}_{Cr}$ ~4.5 eV) and Ni (${\Phi}_{Ni}$~5.2 eV), respectively. Schottky barrier height (${\Phi}_B$) of the fabricated devices were measured to be 0.25~0.31 eV (Cr-S/D device) and 0.16~0.18 eV (Ni-S/D device), respectively in the temperature range of 300 K and 475 K. The experimental results have been compared with 2-dimensional simulations, which allowed bandgap diagram analysis.

Electrical Characteristics of the SiC SBD Prepared by using the Facing Targets Sputtering Method (대향 타겟 스퍼터링법으로 제작한 SiC SBD의 전기적 특성)

  • Lee, Jinseon;Kang, Tai Young;Kim, Kyung Hwan
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.1
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    • pp.27-30
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    • 2015
  • SiC based Schottky barrier diodes were prepared by using the facing targets sputtering method. In this research, 4H-SiC polytypes of SiC were adopted and Molybdenum, Titanium was employed as the Schottky metal of the metal-semiconductor contacts. Both structures showed the rectifying nature in their forward and reverse J-V characteristic curve and the ideality factors calculated from these plots that were close to unity were represented the nearly ideal behavior. Difference of Schottky barrier height between prepared devices was also corresponding with the electrical characteristics of themselves. Therefore the suitability of the facing targets sputtering method for fabrication of Schottky diodes could be suggested from these results.

Studies on Improvement of Schottky Characteristics for GaN Devices (GaN 소자의 쇼트키 특성 향상에 관한 연구)

  • 윤진섭
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.9
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    • pp.700-706
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    • 2001
  • In this paper, I have fabricated and measured the gallium nitride(GaN) based Schottky diodes, and have carried out analyses of degradation of Schottky barrier characteristics. To improve of degraded Schottky barrier characteristics, I have carried out several experiments such as N$_2$ plasma exposure, annealing in N$_2$ ambient and annealing after N$_2$ plasma exposure. In the results of these experiments, I have achieved that only annealing in N$_2$ ambient is enough to improve the Schottky barrier characteristics, are temperature of 700$\^{C}$ and time of 90 sec in N$_2$ ambient furnace. for the analysis of these experiments, I have carried out the measurement of electric characteristics and quantitative analysis of etching damage using AES(Aguger Electron Spectroscopy).

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Fabrication of a Au/Ni/Ti/3C-SiC Schottky Diode and its Characteristics for High-voltages (고내압용 Au/Ni/Ti/3C-SiC 쇼트키 다이오드의 제작과 그 특성)

  • Shim, Jae-Cheol;Chung, Gwiy-Sang
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.4
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    • pp.261-265
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    • 2011
  • This paper describes the fabrication and characteristics of a Au/Ni/Ti/3C-SiC Schottky diode with field plate (FP) edge termination. The Schottky contacts were annealed for 30 min at temperatures ranging from 0 to $800^{\circ}C$. At annealing temperature of $600^{\circ}C$, it showed an inhomogeneous Schottky barrier and had the best electrical characteristics. However, the annealing of $800^{\circ}C$ replaced it with ohmic behaviors because of the formation of many different types of nickel silicides. The fabricated Schottky diode had a breakdown voltage of 200 V, Schottky barrier height of 1.19 eV and worked normally even at $200^{\circ}C$.

Analysis of Thermal Stability and Schottky Barrier Height of Pd Germanide on N-type Ge-on-Si Substrate (N형 Ge-on-Si 기판에 형성된 Pd Germanide의 열안정성 및 Schottky 장벽 분석)

  • Oh, Se-Kyung;Shin, Hong-Sik;Kang, Min-Ho;Bok, Jeong-Deuk;Jung, Yi-Jung;Kwon, Hyuk-Min;Lee, Ga-Won;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.4
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    • pp.271-275
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    • 2011
  • In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

Low Temperature Characteristics of Schottky Barrier Single Electron and Single Hole Transistors

  • Jang, Moongyu;Jun, Myungsim;Zyung, Taehyoung
    • ETRI Journal
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    • v.34 no.6
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    • pp.950-953
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    • 2012
  • Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

Effect of Recombination and Decreasing Low Current on Barrier Potential of Zinc Tin Oxide Thin-Film Transistors According to Annealing Condition

  • Oh, Teresa
    • Journal of information and communication convergence engineering
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    • v.17 no.2
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    • pp.161-165
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    • 2019
  • In this study, zinc tin oxide (ZTO) thin-film transistors are researched to observe the correlation between the barrier potential and electrical properties. Although much research has been conducted on the electronic radiation from Schottky contacts in semiconductor devices, research on electronic radiation that occurs at voltages above the threshold voltage is lacking. Furthermore, the current phenomena occurring below the threshold voltage need to be studied. Bidirectional transistors exhibit current flows below the threshold voltage, and studying the characteristics of these currents can help understand the problems associated with leakage current. A factor that affects the stability of bidirectional transistors is the potential barrier to the Schottky contact. It has been confirmed that Schottky contacts increase the efficiency of the element in semiconductor devices, by cutting off the leakage current, and that the recombination at the PN junction is closely related to the Schottky contacts. The bidirectional characteristics of the transistors are controlled by the space-charge limiting currents generated by the barrier potentials of the SiOC insulated film. Space-charge limiting currents caused by the tunneling phenomenon or quantum effect are new conduction mechanisms in semiconductors, and are different from the leakage current.

Current Modeling for Accumulation Mode GaN Schottky Barrier MOSFET for Integrated UV Sensors

  • Park, Won-June;Hahm, Sung-Ho
    • Journal of Sensor Science and Technology
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    • v.26 no.2
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    • pp.79-84
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    • 2017
  • The drain current of the SB MOSFET was analytically modeled by an equation composed of thermionic emission and tunneling with consideration of the image force lowering. The depletion region electron concentration was used to model the channel electron concentration for the tunneling current. The Schottky barrier width is dependent on the channel electron concentration. The drain current is changed by the gate oxide thickness and Schottky barrier height, but it is hardly changed by the doping concentration. For a GaN SB MOSFET with ITO source and drain electrodes, the calculated threshold voltage was 3.5 V which was similar to the measured value of 3.75 V and the calculated drain current was 1.2 times higher than the measured.

Power Conversion Circuits using SiC Schottky Barrier Diode (SiC 다이오드를 이용한 전력변환회로)

  • Lee, Yoo-Shin;Oh, Duk-Jin;Kim, Hee-Jun
    • Proceedings of the KIEE Conference
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    • 2001.10a
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    • pp.192-195
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    • 2001
  • In this report, we firstly have investigated the electrical characteristics of silicon carbide (SiC) schottky barrier diode and compared the characteristics to those of conventional Si diode through simulation and experiment. Secondly we have investigated the influence of two kinds of diodes to the power conversion circuit of the systems. From the investigation results it is verified that SiC schottky barrier diode is more superior to Si diode in thermal and reverse recovery, characteristics, which are the important factors in the size reduction and higher reliability of the systems. Finally though the experiment applied to PFC(Power Factor Correction) circuits, we precisely verified excellency to thermal characteristic of SiC schottky barrier diode any other diode.

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Fabrication of Schottky diodes for RFID tag integration using Standard $0.18{\mu}m$ CMOS process (RFID tag 집적화를 위한 $0.18{\mu}m$ 표준 CMOS 공정을 이용한 쇼트키 다이오드의 제작)

  • Shim, Dong-Sik;Min, Young-hun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.591-592
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    • 2006
  • Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

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