• Title/Summary/Keyword: Schottky Interface

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Schottky Barrier Thin Film Transistor by using Platinum-silicided Source and Drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터)

  • Shin, Jin-Wook;Chung, Hong-Bay;Lee, Young-Hie;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.6
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    • pp.462-465
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    • 2009
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

Impact of Segregation Layer on Scalability and Analog/RF Performance of Nanoscale Schottky Barrier SOI MOSFET

  • Patil, Ganesh C.;Qureshi, S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.1
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    • pp.66-74
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    • 2012
  • In this paper, the impact of segregation layer density ($N_{DSL}$) and length ($L_{DSL}$) on scalability and analog/RF performance of dopant-segregated Schottky barrier (DSSB) SOI MOSFET has been investigated in sub-30 nm regime. It has been found that, although by increasing the $N_{DSL}$ the increased off-state leakage, short-channel effects and the parasitic capacitances limits the scalability, the reduced Schottky barrier width at source-to-channel interface improves the analog/RF figures of merit of this device. Moreover, although by reducing the $L_{DSL}$ the increased voltage drop across the underlap length reduces the drive current, the increased effective channel length improves the scalability of this device. Further, the gain-bandwidth product in a common-source amplifier based on optimized DSSB SOI MOSFET has improved by ~40% over an amplifier based on raised source/drain ultrathin-body SOI MOSFET. Thus, optimizing $N_{DSL}$ and $L_{DSL}$ of DSSB SOI MOSFET makes it a suitable candidate for future nanoscale analog/RF circuits.

Improved Electrical Properties of Indium Gallium Zinc Oxide Thin-Film Transistors by AZO/Ag/AZO Multilayer Electrode

  • No, Young-Soo;Yang, Jeong-Do;Park, Dong-Hee;Kim, Tae-Whan;Choi, Ji-Won;Choi, Won-Kook
    • Journal of Sensor Science and Technology
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    • v.22 no.2
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    • pp.105-110
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    • 2013
  • We fabricated an a-IGZO thin film transistor (TFT) with AZO/Ag/AZO transparent multilayer source/drain contacts by rf magnetron sputtering. a-IGZO TFT with AZO/Ag/AZO multilayer S/D electrodes (W/L = 400/50 ${\mu}m$) showed a subs-threshold swing of 3.78 V/dec, a minimum off-current of $10^{-12}$ A, a threshold voltage of 0.41 V, a field effect mobility of $10.86cm^2/Vs$, and an on/off ratio of $9{\times}10^9$. From the ultraviolet photoemission spectroscopy, it was revealed that the enhanced electrical performance resulted from the lowering of the Schottky barrier between a-IGZO and Ag due to the insertion of an AZO layer and thus the AZO/Ag/AZO multilayer would be very appropriate for a promising S/D contact material for the fabrication of high performance TFTs.

A Study of the Dependence of Effective Schottky Barrier Height in Ni Silicide/n-Si on the Thickness of the Antimony Interlayer for High Performance n-channel MOSFETs

  • Lee, Horyeong;Li, Meng;Oh, Jungwoo;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.41-47
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    • 2015
  • In this paper, the effective electron Schottky barrier height (${\Phi}_{Bn}$) of the Ni silicide/n-silicon (100) interface was studied in accordance with different thicknesses of the antimony (Sb) interlayer for high performance n-channel MOSFETs. The Sb interlayers, varying its thickness from 2 nm to 10 nm, were deposited by radio frequency (RF) sputtering on lightly doped n-type Si (100), followed by the in situ deposition of Ni/TiN (15/10 nm). It is found that the sample with a thicker Sb interlayer shows stronger ohmic characteristics than the control sample without the Sb interlayer. These results show that the effective ${\Phi}_{Bn}$ is considerably lowered by the influence of the Sb interlayer. However, the current level difference between Schottky diodes fabricated with Sb/Ni/TiN (8/15/10 nm) and Sb/Ni/TiN (10/15/10 nm) structures is almost same. Therefore, considering the process time and cost, it can be said that the optimal thickness of the Sb interlayer is 8 nm. The effective ${\Phi}_{Bn}$ of 0.076 eV was achieved for the Schottky diode with Sb/Ni/TiN (8/15/10 nm) structure. Therefore, this technology is suitable for high performance n-channel MOSFETs.

Electrical characteristics of GaAs MESFET according to the heat treatment of Ti/Au and Ti/Pd/Au schottky contacts (Ti/Au, Ti/Pd/Au 쇼트키 접촉의 열처리에 따른 GaAs MESFET의 전기적 특성)

  • 남춘우
    • Electrical & Electronic Materials
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    • v.8 no.1
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    • pp.56-63
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    • 1995
  • MESFETs of the Ti/Au and Ti/Pd/Au gate were fabricated on n-type GaAs. Interdiffusion at Schottky interfaces, Schottky contact properties, and MESFET characteristics with heat treatment were investigated. Ti of Ti/Au contact and Pd of Ti/Pd/Au contact acted as a barrier metal against interdiffusion of Au at >$220^{\circ}C$. Pd of Ti/Pd/Au contact acted as a barrier metal even at >$360^{\circ}C$, however, Ti of Ti/Au contact promoted interdiffusion of Au instead of role of barrier metal. As the heat treatment temperature increases, in the case of both contact, saturated drain current and pinch off voltage decreased, open channel resistance increased, and degree of parameter variation in Ti/Au gate was higher than in Ti/Pd/Au gate at >$360^{\circ}C$ Schottky barrier height of Ti/Au and Ti/Pd/Au contacts was 0.69eV and 0.68eV in the as-deposited state, respectively, and Fermi level was pinned in the vicinity of 1/2Eg. As the heat treatment temperature increases, barrier height of Ti/Pd/Au contact increased, however, decreased at >$360^{\circ}C$ in the case of Ti/Au contact. Ideality factor of Ti/Au contact was nearly constant regardless of heat treatment, however, increased at >$360^{\circ}C$ in the case of Ti/Au contact. From the results above, Ti/Pd/Au was stable gate metal than Ti/Au.

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Power Generating Characteristics of Zinc Oxide Nanorods Grown on a Flexible Substrate by a Hydrothermal Method

  • Choi, Jae-Hoon;You, Xueqiu;Kim, Chul;Park, Jung-Il;Pak, James Jung-Ho
    • Journal of Electrical Engineering and Technology
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    • v.5 no.4
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    • pp.640-645
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    • 2010
  • This paper describes the power generating property of hydrothermally grown ZnO nanorods on a flexible polyethersulfone (PES) substrate. The piezoelectric currents generated by the ZnO nanorods were measured when bending the ZnO nanorod by using I-AFM, and the measured piezoelectric currents ranged from 60 to 100 pA. When the PtIr coated tip bends a ZnO nanorod, piezoelectrical asymmetric potential is created on the nanorod surface. The Schottky barrier at the ZnO-metal interface accumulates elecntrons and then release very quickly generating the currents when the tip moves from tensile to compressed part of ZnO nanorod. These ZnO nanorods were grown almost vertically with the length of 300-500 nm and the diameter of 30-60 nm on the Ag/Ti/PES substrate at $90^{\circ}C$ for 6 hours by hydrothermal method. The metal-semiconductor interface property was evaluated by using a HP 4145B Semiconductor Parameter Analyzer and the piezoelectric effect of the ZnO nanorods were evaluated by using an I-AFM. From the measured I-V characteristics, it was observed that ZnO-Ag and ZnO-Au metal-semiconductor interfaces showed an ohmic and a Schottky contact characteristics, respectively. ANSYS finite element simulation was performed in order to understand the power generation mechanism of the ZnO nanorods under applied external stress theoretically.

Application of Nanoroll-Type Ag/g-C3N4 for Selective Conversion of Toxic Nitrobenzene to Industrially-Valuable Aminobenzene

  • Devaraji, Perumal;Jo, Wan-Kuen
    • Journal of Environmental Science International
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    • v.29 no.1
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    • pp.95-108
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    • 2020
  • Silver nanoparticles were loaded onto g-C3N4 (CN) with a nanoroll-type morphology (Ag/CN) synthesized using a co-polymerization method for highly selective conversion of toxic nitrobenzene to industrially-valuable aminobenzene. Scanning electron microscopy and high-resolution transmission electron microscopy (HRTEM) images of Ag/CN revealed the generation of the nanoroll-type morphology of CN. Additionally, HRTEM analysis provided direct evidence of the generation of a Schottky barrier between Ag and CN in the Ag/CN nanohybrid. Photoluminescence analysis and photocurrent measurements suggested that the introduction of Ag into CN could minimize charge recombination rates, enhancing the mobility of electrons and holes to the surface of the photocatalyst. Compared to pristine CN, Ag/CN displayed much higher ability in the photocatalytic reduction of nitrobenzene to aminobenzene, underscoring the importance of Ag deposition on CN. The enhanced photocatalytic performance and photocurrent generation were primarily ascribed to the Schottky junction formed at the Ag/CN interface, greater visible-light absorption efficiency, and improved charge separation associated with the nanoroll morphology of CN. Ag would act as an electron sink/trapping center, enhancing the charge separation, and also serve as a good co-catalyst. Overall, the synergistic effects of these features of Ag/CN improved the photocatalytic conversion of nitrobenzene to aminobenzene.

The Effect of Surface Plasmon on Internal Photoemission Measured on Ag/$TiO_2$ Nanodiodes

  • Lee, Hyosun;Lee, Young Keun;Park, Jeong Young
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.662-662
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    • 2013
  • Over the last several decades, innovative light-harvesting devices have evolved to achieve high efficiency in solar energy transfer. Research on the mechanisms for plasmon resonance is very desirable to overcome the conventional efficiency limits of photovoltaics. The influence of localized surface plasmon resonance on hot electron flow at a metal-semiconductor interface was observed with a Schottky diode composed of a thin silver layer on $TiO_2$. The photocurrent is generated by absorption of photons when electrons have enough energy to travel over the Schottky barrier and into the titanium oxide conduction band. The correlation between the hot electrons and the surface plasmon is confirmed by matching the range of peaks between the incident photons to current conversion efficiency (IPCE, flux of collected electrons per flux of incident photons) and UV-Vis spectra. The photocurrent measured on Ag/$TiO_2$ exhibited surface plasmon peaks; whereas, in contrast to the Au/$TiO_2$, a continuous Au thin film doesn't exhibit surface plasmon peaks. We modified the thickness and morphology of a continuous Ag layer by electron beam evaporation deposition and heating under gas conditions and found that the morphological change and thickness of the Ag film are key factors in controlling the peak position of light absorption.

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Schottky barrier polycrystalline silicon thin film transistor by using platinum-silicided source and drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터트랜지스터)

  • Shin, Jin-Wook;Choi, Chel-Jong;Chung, Hong-Bay;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.80-81
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    • 2008
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

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