• Journal of the Optical Society of Korea
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• v.20 no.5
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• pp.623-627
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• 2016

A power-adjustable fully-integrated CMOS optical receiver with multi-rate clock-and-data recovery circuit is presented in standard 65-nm CMOS technology. With supply voltage scaling, key features of the optical receiver such as bandwidth, power efficiency, and optical sensitivity can be automatically optimized according to the bit rates. The prototype receiver has −23.7 dBm to −15.4 dBm of optical sensitivity for 10⁻⁹ bit error rate with constant conversion gain around all target bit rates from 1.62Gbps to 8.1 Gbps. Power efficiency is less than 9.3 pJ/bit over all operating ranges.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3B
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• pp.557-564
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• 2000

This paper presents a watermarking algorithm for embedding visually recognizable pattern (Mark, Logo, Symbol, stamping or signature) into the image. first, the color image(RGB model)is transformed in YCbCr model and then the Y component is transformed into 3-level wavelet transform. Next, the values are assembled with pattern watermark. PN(pseudo noise) code at spread spectrum communication method and mutilevel watermark weights. This values are inserted into discrete wavelet domain. In our scheme, new calculating method is designed to calculate wavelet transform with integer value in considering the quantization error. and we used the color conversion with fixed-point arithmetic to be easy to make the hardware hereafter. Also, we made the new solution using mutilevel threshold to robust to common signal distortions and malicious attack, and to enhance quality of image in considering the human visual system. the experimental results showed that the proposed watermarking algorithm was superior to other similar water marking algorithm. We showed what it was robust to common signal processing and geometric transform such as brightness. contrast, filtering. scaling. JPEG lossy compression and geometric deformation.

• The Journal of Korea Robotics Society
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• v.16 no.1
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• pp.64-71
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• 2021

This paper describes a robotic teleoperation system to perform an accurate needle insertion into a cornea for a separation between the stromal layer and Descemet's membrane during deep anterior lamellar Keratoplasty (DALK). The system can reduce the hand tremor of a surgeon by scaling the input motion, which is the control input of the slave robot. Moreover, we utilize corneal applanation to estimate the insertion depth. The proposed system was validated by performing the layer separation using 25 porcine eyes. The average depth of needle insertion was 742 ± 39.8 ㎛ while the target insertion depth was 750 ㎛. Tremor error was reduced from 402 ± 248 ㎛ in the master device to 28.5 ± 21.0 ㎛ in the slave robot. The rate of complete success, partial success, and failure were 60, 28, and 12%, respectively. The experimental results showed that the proposed system was able to reduce the hand tremor of surgeons and perform precise needle insertion during DALK.

• Journal of Educational Research in Mathematics
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• v.14 no.1
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• pp.39-69
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• 2004

This paper investigates the teaching and learning of Linear function relating functional contexts and suggests the improved methods of representation-shift through this analysis. The methods emphasize the link between students' preacquired knowledge of mathematical representations and the way of using those. This methods are explanatory teaching, teaching and teaming based on modelling perspectives or tasks (interpretation, prediction, translation and scaling). We categorize the 8th grade middle school students' errors on the linear function relating real contexts and make a comparative study of the error-remedial effects and the teaching and teaming methods. We present the results of a study in which representation-shift methods based on modelling perspectives and tasks are more effective in terms of flexible connection of representations and error remediation. Also, We describe how students used modelling perspective-taking to explain and justify their conceptual models, to assess the quality of their models and to make connection to other mathematical representation during the problem solving focusing on the students' self-diagnosis.

• Journal of the Korea Society of Computer and Information
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• v.15 no.5
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• pp.13-21
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• 2010

The Optimal results of Kalman Filtering on the Inverted Pendulum System requires an effective factor such as the noise covariance matrix Q, the measurement noise covariance matrix R and the initial error covariance matrix $P_0$. We present a special case where the optimality of the filter is not destroyed and not sensitive to scaling of these covariance matrix because these factors are unknown or are known only approximately in the practical situation. Moreover, the error covariance matrices issued by this method predict errors in the state estimate consistent with the scaled covariance matrices and not the issued state estimates. Various results using the scalar gain $\delta$ are derived to described the relations among the three covariance matrices, Kalman Gain and the error covariance matrices. This paper is described as follows: Section III a brief overview of the Inverted Pendulum system. Section IV deals with the mathematical dynamic model of the system used for the computer simulation. Section V presents a various simulation results using the scalar gain.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.3
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• pp.111-116
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• 2013

With technology scaling, soft error rate has greatly increased in embedded systems. Due to high performance and low power consumption, VLIW (Very Long Instruction Word) architectures have been widely used in embedded systems and thus many researches have been studied to improve the reliability of a system by duplicating instructions in VLIW architectures. However, existing studies have ignored the feature, called VLES (Variable Length Execution Set), which is adopted in most modern VLIW architectures to reduce code size. In this paper, we propose how to support instruction duplication in VLIW architecture with VLES. Our experimental results demonstrate that a VLIW architecture with VLES shows 64% code size decrement on average at the cost of about 4% additional cell area as compared to the case of a VLIW architecture without VLES when instruction duplication is applied to both architectures. Also, it is shown that the case with VLES does not cause extra execution time compared to the case without VLES.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.1
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• pp.65-73
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• 2007

This paper presents an on-line correction method of current measurement errors for a pure-integration-based flux estimation down to 1-Hz stator frequency. An observer-based approach is taken as one possible solution of eliminating the dc offset and the negative sequence component of unbalanced gains in the synchronous coordinate. At the same time, the positive sequence component estimation is performed by creating an error signal between a motor model reference and an estimated q-axis rotor flux established by a permanent magnet (PM) in the synchronous coordinate. The compensator utilizes a PI controller that controls the error signal to zero. The proposed technique further contains a residual error compensator to completely eliminate miscellaneous disturbances in the estimated flux. The developed algorithm has been implemented on a 1.1-kW permanent magnet synchronous motor (PMSM) drive to confirm the effectiveness of the proposed scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.9B
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• pp.832-844
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• 2008

Distributed localization algorithms are necessary for large-scale wireless sensor network applications. In this paper, we introduce an efficient node distribution based localization algorithm that emphasizes simple refinement and low system load for low-cost and low-rate wireless sensors. Each node adaptively chooses neighbor nodes for sensors, update its position estimate by minimizing a local cost function and then passes this update to the neighbor nodes. The update process considers a distribution of nodes for large-scale networks which have same density in a unit area for optimizing the system performance. Neighbor nodes are selected within a range which provides the smallest received signal strength error based on the real experiments. MATLAB simulation showed that the proposed algorithm is more accurate than trilateration and les complex than multidimensional scaling. The implementation on MicaZ using TinyOS-2.x confirmed the practicality of the proposed algorithm.

• Proceedings of the KSRS Conference
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• 2004.10a
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• pp.344-346
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• 2004

IKONOS 1m satellite imagery is particularly well suited for 3-D feature extraction and 1 :5,000 scale topographic mapping. Because the image line and sample calculated by given RPCs have the error of more than 11m, in order to be able to perform feature extraction and topographic mapping, rational polynomial coefficients(RPCs) camera model that are derived from the very complex IKONOS sensor model to describe the object-image geometry must be refined by several Ground Control Points(GCPs). This paper presents a quantitative evaluation of the geometric accuracy that can be achieved with IKONOS imagery by refining the offset and scaling factors of RPCs using several GCPs. If only two GCPs are available, the offsets and scale factors of image line and sample are updated. If we have more than three GCPs, four parameters of the offsets and scale factors of image line and sample are refined first, and then six parameters of the offsets and scale factors of latitude, longitude and height are updated. The stereo images acquired by IKONOS satellite are tested using six ground points. First, the RPCs model was refined using 2 GCPs and 4 check points acquired by GPS. The results from IKONOS stereo images are reported and these show that the RMSE of check point acquired from left images and right are 1.021m and 1.447m. And then we update the RPCs model using 4 GCPs and 2 check points. The RMSE of geometric accuracy is 0.621 m in left image and 0.816m in right image.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.16-23
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• 2009

A 12b 10MS/s pipelined ADC with low DC gain amplifiers is presented. The pipelined ADC using a reference scaling technique is proposed to compensate the gain error in MDACs due to a low DC gain amplifier. To minimize the performance degradation of the ADC due to amplifier offset, the proposed offset trimming circuit is employed m the first-stage MDAC amplifier. Additional reset switches are used in all MDACs to reduce the memory effect caused by the low DC gain amplifier. The measured differential and integral non-linearities of the prototype ADC with 45dB DC gain amplifiers are less than 0.7LSB and 3.1LSB, respectively. The prototype ADC is fabricated in a $0.35{\mu}m$ CMOS process and achieves 62dB SNDR and 72dB SFDR with 2.4V supply and 10MHz sampling frequency while consuming 19mW power.